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Searched refs:DSPSURF (Results 1 – 6 of 6) sorted by relevance

/Linux-v4.19/drivers/gpu/drm/i915/gvt/
Dfb_decoder.c251 plane->base = vgpu_vreg_t(vgpu, DSPSURF(pipe)) & I915_GTT_PAGE_MASK; in intel_vgpu_decode_primary_plane()
Dhandlers.c746 calc_index(offset, _DSPASURF, _DSPBSURF, 0, DSPSURF(PIPE_C))
1967 MMIO_DH(DSPSURF(PIPE_A), D_ALL, NULL, pri_surf_mmio_write); in init_generic_mmio_info()
1976 MMIO_DH(DSPSURF(PIPE_B), D_ALL, NULL, pri_surf_mmio_write); in init_generic_mmio_info()
1985 MMIO_DH(DSPSURF(PIPE_C), D_ALL, NULL, pri_surf_mmio_write); in init_generic_mmio_info()
Dcmd_parser.c1203 info->surf_reg = DSPSURF(info->pipe); in gen8_decode_mi_display_flip()
1269 info->surf_reg = DSPSURF(info->pipe); in skl_decode_mi_display_flip()
/Linux-v4.19/drivers/gpu/drm/i915/
Dintel_display.c3354 I915_WRITE_FW(DSPSURF(i9xx_plane), in i9xx_update_plane()
3359 I915_WRITE_FW(DSPSURF(i9xx_plane), in i9xx_update_plane()
3385 I915_WRITE_FW(DSPSURF(i9xx_plane), 0); in i9xx_disable_plane()
7761 base = I915_READ(DSPSURF(i9xx_plane)) & 0xfffff000; in i9xx_get_initial_plane_config()
7767 base = I915_READ(DSPSURF(i9xx_plane)) & 0xfffff000; in i9xx_get_initial_plane_config()
16103 error->plane[i].surface = I915_READ(DSPSURF(i)); in intel_display_capture_error_state()
Dintel_pm.c8411 I915_WRITE(DSPSURF(pipe), I915_READ(DSPSURF(pipe))); in g4x_disable_trickle_feed()
8412 POSTING_READ(DSPSURF(pipe)); in g4x_disable_trickle_feed()
Di915_reg.h6167 #define DSPSURF(plane) _MMIO_PIPE2(plane, _DSPASURF) macro