Searched refs:DSI_28nm_PHY_PLL_GLB_CFG_PLL_ENABLE (Results 1 – 2 of 2) sorted by relevance
348 val |= DSI_28nm_PHY_PLL_GLB_CFG_PLL_ENABLE; in dsi_pll_28nm_enable_seq_hpm()384 val |= DSI_28nm_PHY_PLL_GLB_CFG_PLL_ENABLE; in dsi_pll_28nm_enable_seq_hpm()422 DSI_28nm_PHY_PLL_GLB_CFG_PLL_ENABLE; in dsi_pll_28nm_enable_seq_lp()
1002 #define DSI_28nm_PHY_PLL_GLB_CFG_PLL_ENABLE 0x00000008 macro
