Searched refs:DRV_STRENGTH_SEL_MASK (Results 1 – 2 of 2) sorted by relevance
55 #define DRV_STRENGTH_SEL_MASK 0x3UL macro
661 arg = (pin_reg >> DRV_STRENGTH_SEL_OFF) & DRV_STRENGTH_SEL_MASK; in amd_pinconf_get()711 pin_reg &= ~(DRV_STRENGTH_SEL_MASK in amd_pinconf_set()713 pin_reg |= (arg & DRV_STRENGTH_SEL_MASK) in amd_pinconf_set()
