Searched refs:DP_MAX_LANE_COUNT (Results 1 – 6 of 6) sorted by relevance
75 #define DP_MAX_LANE_COUNT 0x002 macro1024 return dpcd[DP_MAX_LANE_COUNT] & DP_MAX_LANE_COUNT_MASK; in drm_dp_max_lane_count()1031 (dpcd[DP_MAX_LANE_COUNT] & DP_ENHANCED_FRAME_CAP); in drm_dp_enhanced_frame_cap()1038 dpcd[DP_MAX_LANE_COUNT] & DP_TPS3_SUPPORTED; in drm_dp_tps3_supported()
735 if (drm_dp_dpcd_readb(&amdgpu_connector->ddc_bus->aux, DP_MAX_LANE_COUNT, &tmp) in amdgpu_atombios_dp_link_train()
257 ret = drm_dp_dpcd_readb(&dp->aux, DP_MAX_LANE_COUNT, &data); in analogix_dp_is_enhanced_mode_available()698 drm_dp_dpcd_readb(&dp->aux, DP_MAX_LANE_COUNT, &data); in analogix_dp_get_max_rx_lane_count()
834 if (drm_dp_dpcd_readb(&radeon_connector->ddc_bus->aux, DP_MAX_LANE_COUNT, &tmp) in radeon_dp_link_train()
329 max_lane_count = intel_dp->dpcd[DP_MAX_LANE_COUNT] & 0x1f; in cdv_intel_dp_max_lane_count()1079 (intel_dp->dpcd[DP_MAX_LANE_COUNT] & DP_ENHANCED_FRAME_CAP)) { in cdv_intel_dp_mode_set()
2396 DP_MAX_LANE_COUNT - DP_DPCD_REV]; in retrieve_link_cap()
