Searched refs:DPMTABLE_UPDATE_MCLK (Results 1 – 9 of 9) sorted by relevance
191 #define DPMTABLE_UPDATE_MCLK 0x00000008 macro
3892 pi->need_update_smu7_dpm_table |= DPMTABLE_UPDATE_MCLK; in ci_find_dpm_states_clocks_in_dpm_table()3920 if (pi->need_update_smu7_dpm_table & (DPMTABLE_OD_UPDATE_MCLK | DPMTABLE_UPDATE_MCLK)) { in ci_populate_and_upload_sclk_mclk_dpm_levels()
192 #define DPMTABLE_UPDATE_MCLK 0x00000008 macro
4038 pi->need_update_smu7_dpm_table |= DPMTABLE_UPDATE_MCLK; in ci_find_dpm_states_clocks_in_dpm_table()4066 if (pi->need_update_smu7_dpm_table & (DPMTABLE_OD_UPDATE_MCLK | DPMTABLE_UPDATE_MCLK)) { in ci_populate_and_upload_sclk_mclk_dpm_levels()
178 #define DPMTABLE_UPDATE_MCLK 0x00000008 macro
3613 data->need_update_smu7_dpm_table |= DPMTABLE_UPDATE_MCLK; in smu7_find_dpm_states_clocks_in_dpm_table()3761 (DPMTABLE_OD_UPDATE_MCLK + DPMTABLE_UPDATE_MCLK)) { in smu7_populate_and_upload_sclk_mclk_dpm_levels()
3252 data->need_update_dpm_table |= DPMTABLE_UPDATE_MCLK; in vega10_find_dpm_states_clocks_in_dpm_table()3290 (DPMTABLE_OD_UPDATE_MCLK + DPMTABLE_UPDATE_MCLK)) { in vega10_populate_and_upload_sclk_mclk_dpm_levels()
378 #define DPMTABLE_UPDATE_MCLK 0x00000008 macro
2208 DPMTABLE_UPDATE_MCLK)) in vegam_program_mem_timing_parameters()
