Searched refs:DPLL_CTRL1_LINK_RATE_MASK (Results 1 – 4 of 4) sorted by relevance
838 switch (val & DPLL_CTRL1_LINK_RATE_MASK(SKL_DPLL0)) { in skl_dpll0_update()850 MISSING_CASE(val & DPLL_CTRL1_LINK_RATE_MASK(SKL_DPLL0)); in skl_dpll0_update()951 DPLL_CTRL1_LINK_RATE_MASK(SKL_DPLL0)); in skl_dpll0_enable()
1547 link_clock = dpll_ctl1 & DPLL_CTRL1_LINK_RATE_MASK(pll_id); in skl_ddi_clock_get()
937 DPLL_CTRL1_LINK_RATE_MASK(id)); in skl_ddi_pll_write_ctrl1()
9254 #define DPLL_CTRL1_LINK_RATE_MASK(id) (7 << ((id) * 6 + 1)) macro
