Searched refs:DPCLKA_CFGCR0_DDI_CLK_SEL_MASK (Results 1 – 3 of 3) sorted by relevance
2563 val &= ~DPCLKA_CFGCR0_DDI_CLK_SEL_MASK(port); in icl_map_plls_to_ports()2621 val &= ~DPCLKA_CFGCR0_DDI_CLK_SEL_MASK(port); in intel_ddi_clk_select()
9219 temp = I915_READ(DPCLKA_CFGCR0) & DPCLKA_CFGCR0_DDI_CLK_SEL_MASK(port); in cannonlake_get_ddi_pll()9240 DPCLKA_CFGCR0_DDI_CLK_SEL_MASK(port); in icelake_get_ddi_pll()
9318 #define DPCLKA_CFGCR0_DDI_CLK_SEL_MASK(port) (3 << DPCLKA_CFGCR0_DDI_CLK_SEL_SHIFT(port)) macro
