Searched refs:DMA_STATUS_REG (Results 1 – 9 of 9) sorted by relevance
867 case (DMA_STATUS_REG + DMA0_REGISTER_OFFSET): in cayman_get_allowed_info_register()868 case (DMA_STATUS_REG + DMA1_REGISTER_OFFSET): in cayman_get_allowed_info_register()1766 tmp = RREG32(DMA_STATUS_REG + DMA0_REGISTER_OFFSET); in cayman_gpu_check_soft_reset()1771 tmp = RREG32(DMA_STATUS_REG + DMA1_REGISTER_OFFSET); in cayman_gpu_check_soft_reset()
1330 #define DMA_STATUS_REG 0xd034 macro
1101 case DMA_STATUS_REG: in evergreen_get_allowed_info_register()3786 RREG32(DMA_STATUS_REG)); in evergreen_print_gpu_status_regs()3789 RREG32(DMA_STATUS_REG + 0x800)); in evergreen_print_gpu_status_regs()3844 tmp = RREG32(DMA_STATUS_REG); in evergreen_gpu_check_soft_reset()
1840 #define DMA_STATUS_REG 0xd034 macro
1318 case (DMA_STATUS_REG + DMA0_REGISTER_OFFSET): in si_get_allowed_info_register()1319 case (DMA_STATUS_REG + DMA1_REGISTER_OFFSET): in si_get_allowed_info_register()3798 tmp = RREG32(DMA_STATUS_REG + DMA0_REGISTER_OFFSET); in si_gpu_check_soft_reset()3803 tmp = RREG32(DMA_STATUS_REG + DMA1_REGISTER_OFFSET); in si_gpu_check_soft_reset()
175 case DMA_STATUS_REG: in r600_get_allowed_info_register()1578 RREG32(DMA_STATUS_REG)); in r600_print_gpu_status_regs()1641 tmp = RREG32(DMA_STATUS_REG); in r600_gpu_check_soft_reset()
2625 #define DMA_STATUS_REG 0xd034 macro
638 #define DMA_STATUS_REG 0xd034 macro
1904 #define DMA_STATUS_REG 0x340d macro
