Searched refs:DFL_FPGA_PORT_RESET (Results 1 – 3 of 3) sorted by relevance
67 #define DFL_FPGA_PORT_RESET _IO(DFL_FPGA_MAGIC, DFL_PORT_BASE + 0) macro
127 Reset AFU (*DFL_FPGA_PORT_RESET)129 *DFL_FPGA_PORT_RESET: reset the FPGA Port and its AFU. Userspace can do Port
174 case DFL_FPGA_PORT_RESET: in port_hdr_ioctl()
