Searched refs:DFL (Results 1 – 6 of 6) sorted by relevance
134 tristate "FPGA Device Feature List (DFL) support"138 Device Feature List (DFL) defines a feature list structure that150 tristate "FPGA DFL FME Driver"154 under Device Feature List (DFL) framework. Select this option to157 per DFL based FPGA device.160 tristate "FPGA DFL FME Manager Driver"166 tristate "FPGA DFL FME Bridge Driver"172 tristate "FPGA DFL FME Region Driver"178 tristate "FPGA DFL AFU Driver"184 Port/AFU per DFL based FPGA device.[all …]
2 FPGA Device Feature List (DFL) Framework Overview8 The Device Feature List (DFL) FPGA framework (and drivers according to this12 implement the DFL in the device memory. Besides this, the DFL framework16 Device Feature List (DFL) Overview18 Device Feature List (DFL) defines a linked list of feature headers within the143 DFL Framework Overview156 | FPGA DFL Device Module |163 DFL framework in kernel provides common interfaces to create container device170 The FPGA DFL Device could be different hardwares, e.g. PCIe device, platform174 and related resources to common interfaces from DFL framework for enumeration.[all …]
58 #define DFL( x ) D4C( rs -> s_v1.x ) macro230 int hash_code = DFL(s_hash_function_code); in show_on_disk_super()248 DFL(s_block_count), in show_on_disk_super()249 DFL(s_free_blocks), in show_on_disk_super()250 DFL(s_root_block), in show_on_disk_super()
5 Description: Read-only. It returns id of this port. One DFL FPGA device
5 Description: Read-only. One DFL FPGA device may have more than 1
5779 FPGA DFL DRIVERS
