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Searched refs:DEF_INT_MASK (Results 1 – 3 of 3) sorted by relevance

/Linux-v4.19/drivers/net/ethernet/hisilicon/
Dhisi_femac.c84 #define DEF_INT_MASK (IRQ_INT_MULTI_RXRDY | \ macro
328 writel(ints & DEF_INT_MASK, in hisi_femac_poll()
330 } while (ints & DEF_INT_MASK); in hisi_femac_poll()
334 hisi_femac_irq_enable(priv, DEF_INT_MASK & in hisi_femac_poll()
349 if (likely(ints & DEF_INT_MASK)) { in hisi_femac_interrupt()
350 writel(ints & DEF_INT_MASK, in hisi_femac_interrupt()
352 hisi_femac_irq_disable(priv, DEF_INT_MASK); in hisi_femac_interrupt()
489 hisi_femac_irq_enable(priv, IRQ_ENA_ALL | IRQ_ENA_PORT0 | DEF_INT_MASK); in hisi_femac_net_open()
Dhip04_eth.c59 #define DEF_INT_MASK (RCV_INT | DEF_INT_ERR) macro
315 priv->reg_inten = DEF_INT_MASK; in hip04_mac_enable()
325 priv->reg_inten &= ~(DEF_INT_MASK); in hip04_mac_disable()
471 writel_relaxed(DEF_INT_MASK & ~RCV_INT, in hip04_mac_start_xmit()
578 writel_relaxed(DEF_INT_MASK, priv->base + PPE_RINT); in hip04_mac_interrupt()
595 writel_relaxed(DEF_INT_MASK & ~RCV_INT, priv->base + PPE_INTEN); in hip04_mac_interrupt()
612 writel_relaxed(DEF_INT_MASK & ~RCV_INT, priv->base + PPE_INTEN); in tx_done()
Dhix5hd2_gmac.c135 #define DEF_INT_MASK (RX_BQ_IN_INT | RX_BQ_IN_TIMEOUT_INT | \ macro
413 writel_relaxed(DEF_INT_MASK, priv->base + ENA_PMU_INT); in hix5hd2_irq_enable()
662 } while (ints & DEF_INT_MASK); in hix5hd2_poll()
679 if (likely(ints & DEF_INT_MASK)) { in hix5hd2_interrupt()