Searched refs:DE4X5_CACHE_ALIGN (Results 1 – 1 of 1) sorted by relevance
667 #define DE4X5_CACHE_ALIGN CAL_16LONG macro1401 bmr = (lp->chipset==DC21140 ? PBL_8 : PBL_4) | DESC_SKIP_LEN | DE4X5_CACHE_ALIGN; in de4x5_sw_reset()