Searched refs:DDR40_PHY_CONTROL_REGS_0_STANDBY_CTRL (Results 1 – 2 of 2) sorted by relevance
211 DDR40_PHY_CONTROL_REGS_0_STANDBY_CTRL); in brcmstb_pm_s3()215 DDR40_PHY_CONTROL_REGS_0_STANDBY_CTRL); in brcmstb_pm_s3()218 DDR40_PHY_CONTROL_REGS_0_STANDBY_CTRL); in brcmstb_pm_s3()
30 #define DDR40_PHY_CONTROL_REGS_0_STANDBY_CTRL 0xa4 macro