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Searched refs:CSR0_STOP (Results 1 – 7 of 7) sorted by relevance

/Linux-v4.19/drivers/net/ethernet/amd/
Dsun3lance.c214 #define CSR0_STOP 0x0004 /* stop (RS) */ macro
332 ioaddr_probe[0] = CSR0_INIT | CSR0_STOP; in lance_probe()
334 if(ioaddr_probe[0] != CSR0_STOP) { in lance_probe()
359 REGA(CSR0) = CSR0_STOP; in lance_probe()
424 REGA(CSR0) = CSR0_STOP; in lance_open()
438 DREG = CSR0_STOP; in lance_open()
532 DREG = CSR0_STOP; in lance_start_xmit()
589 REGA( CSR0 ) = CSR0_STOP; in lance_start_xmit()
717 REGA(CSR0) = CSR0_STOP; in lance_interrupt()
755 REGA(CSR0) = CSR0_STOP; in lance_interrupt()
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Datarilance.c314 #define CSR0_STOP 0x0004 /* stop (RS) */ macro
509 ioaddr[0] = CSR0_INIT | CSR0_STOP; in lance_probe1()
510 if (ioaddr[0] != CSR0_STOP) { in lance_probe1()
516 ioaddr[0] = CSR0_STOP; in lance_probe1()
517 if (ioaddr[0] != CSR0_STOP) { in lance_probe1()
537 REGA( CSR0 ) = CSR0_STOP; in lance_probe1()
664 DREG = CSR0_STOP; in lance_open()
737 DREG = CSR0_STOP; in lance_tx_timeout()
871 DREG = csr0 & ~(CSR0_INIT | CSR0_STRT | CSR0_STOP | in lance_interrupt()
1057 DREG = CSR0_STOP; in lance_close()
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Dam79c961a.c247 …rreg (dev->base_addr, CSR0, CSR0_BABL|CSR0_CERR|CSR0_MISS|CSR0_MERR|CSR0_TINT|CSR0_RINT|CSR0_STOP); in am79c961_init_for_open()
299 write_rreg (dev->base_addr, CSR0, CSR0_STOP); in am79c961_init_for_open()
368 write_rreg (dev->base_addr, CSR0, CSR0_STOP); in am79c961_close()
389 stopped = read_rreg(dev->base_addr, CSR0) & CSR0_STOP; in am79c961_setmulticastlist()
642 write_rreg (dev->base_addr, CSR0, CSR0_STOP); in am79c961_hw_init()
Dni65.h32 #define CSR0_STOP 0x0004 /* Stop (RS) */ macro
Dam79c961a.h33 #define CSR0_STOP 0x0004 macro
Dpcnet32.c199 #define CSR0_STOP 0x4 macro
774 lp->a->write_csr(ioaddr, CSR0, CSR0_STOP); in pcnet32_set_link_ksettings()
901 lp->a->write_csr(ioaddr, CSR0, CSR0_STOP); /* stop the chip */ in pcnet32_set_ringparam()
997 lp->a->write_csr(ioaddr, CSR0, CSR0_STOP); /* stop the chip */ in pcnet32_loopback_test()
1011 lp->a->write_csr(ioaddr, CSR0, CSR0_STOP); /* Set STOP bit */ in pcnet32_loopback_test()
1084 lp->a->write_csr(ioaddr, CSR0, CSR0_STOP); /* Set STOP bit */ in pcnet32_loopback_test()
1454 if (!(csr0 & CSR0_STOP)) /* If not stopped */ in pcnet32_get_regs()
1491 if (!(csr0 & CSR0_STOP)) /* If not stopped */ in pcnet32_get_regs()
2437 if (lp->a->read_csr(ioaddr, CSR0) & CSR0_STOP) in pcnet32_restart()
2468 lp->a->write_csr(ioaddr, CSR0, CSR0_STOP); in pcnet32_tx_timeout()
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Dni65.c273 writereg(CSR0_STOP | CSR0_CLRALL,CSR0); /* STOP */ in ni65_set_performance()
576 writereg(CSR0_CLRALL|CSR0_STOP,CSR0); in ni65_init_lance()
727 writedatareg(CSR0_STOP); in ni65_stop_start()