Searched refs:CRTC2_DISPLAY_BASE_ADDR (Results 1 – 3 of 3) sorted by relevance
598 rinfo->save_regs[33] = INREG(CRTC2_DISPLAY_BASE_ADDR); in radeon_pm_save_regs()707 OUTREG(CRTC2_DISPLAY_BASE_ADDR, rinfo->save_regs[33]); in radeon_pm_restore_regs()1731 OUTREG(CRTC2_DISPLAY_BASE_ADDR, rinfo->save_regs[33]); in radeon_reinitialize_M10()1986 OUTREG(CRTC2_DISPLAY_BASE_ADDR, rinfo->save_regs[33]); in radeon_reinitialize_M9P()2225 OUTREG(CRTC2_DISPLAY_BASE_ADDR, rinfo->save_regs[33]);
2084 OUTREG(CRTC2_DISPLAY_BASE_ADDR, aper_base); in fixup_memory_mappings()2089 OUTREG(CRTC2_DISPLAY_BASE_ADDR, 0); in fixup_memory_mappings()2125 OUTREG(CRTC2_DISPLAY_BASE_ADDR, (tom & 0xffff) << 16); in radeon_identify_vram()
100 #define CRTC2_DISPLAY_BASE_ADDR 0x033c macro
