Searched refs:CP0 (Results 1 – 5 of 5) sorted by relevance
114 /* CON6 on CP0 expansion */119 /* CON5 on CP0 expansion */148 /* CON4 on CP0 expansion */153 /* CON9 on CP0 expansion */159 /* CON10 on CP0 expansion */
78 @ CP0 and CP1 accessible?82 @ enable access to CP0 and CP1212 @ enable access to CP0 and CP1226 @ disable access to CP0 and CP1327 @ CP0 and CP1 accessible?
850 #define CP0 (1 << 0) macro
3526 ref_and_mask = CP0; in cik_hdp_flush_cp_ring_emit()
2056 MIPS CP0 registers (see KVM_REG_MIPS_CP0_* above) have the following id bit
