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Searched refs:CORE_MOD (Results 1 – 13 of 13) sorted by relevance

/Linux-v4.19/arch/arm/mach-omap2/
Domap_hwmod_2xxx_ipblock_data.c241 .module_offs = CORE_MOD,
256 .module_offs = CORE_MOD,
271 .module_offs = CORE_MOD,
286 .module_offs = CORE_MOD,
301 .module_offs = CORE_MOD,
316 .module_offs = CORE_MOD,
331 .module_offs = CORE_MOD,
346 .module_offs = CORE_MOD,
361 .module_offs = CORE_MOD,
376 .module_offs = CORE_MOD,
[all …]
Domap_hwmod_2430_data.c90 .module_offs = CORE_MOD,
105 .module_offs = CORE_MOD,
120 .module_offs = CORE_MOD,
150 .module_offs = CORE_MOD,
163 .module_offs = CORE_MOD,
195 .module_offs = CORE_MOD,
239 .module_offs = CORE_MOD,
255 .module_offs = CORE_MOD,
271 .module_offs = CORE_MOD,
287 .module_offs = CORE_MOD,
[all …]
Dcm3xxx.c425 omap2_cm_read_mod_reg(CORE_MOD, CM_FCLKEN1); in omap3_cm_save_context()
427 omap2_cm_read_mod_reg(CORE_MOD, OMAP3430ES2_CM_FCLKEN3); in omap3_cm_save_context()
441 omap2_cm_read_mod_reg(CORE_MOD, CM_ICLKEN1); in omap3_cm_save_context()
443 omap2_cm_read_mod_reg(CORE_MOD, CM_ICLKEN2); in omap3_cm_save_context()
445 omap2_cm_read_mod_reg(CORE_MOD, CM_ICLKEN3); in omap3_cm_save_context()
467 omap2_cm_read_mod_reg(CORE_MOD, OMAP2_CM_CLKSTCTRL); in omap3_cm_save_context()
482 omap2_cm_read_mod_reg(CORE_MOD, CM_AUTOIDLE1); in omap3_cm_save_context()
484 omap2_cm_read_mod_reg(CORE_MOD, CM_AUTOIDLE2); in omap3_cm_save_context()
486 omap2_cm_read_mod_reg(CORE_MOD, CM_AUTOIDLE3); in omap3_cm_save_context()
555 omap2_cm_write_mod_reg(cm_context.core_cm_fclken1, CORE_MOD, in omap3_cm_restore_context()
[all …]
Dpm24xx.c79 omap_prm_clear_mod_irqs(CORE_MOD, PM_WKST1, ~0); in omap2_enter_full_retention()
80 omap_prm_clear_mod_irqs(CORE_MOD, OMAP24XX_PM_WKST2, ~0); in omap2_enter_full_retention()
108 omap_prm_clear_mod_irqs(CORE_MOD, PM_WKST1, ~0); in omap2_enter_full_retention()
109 omap_prm_clear_mod_irqs(CORE_MOD, OMAP24XX_PM_WKST2, ~0); in omap2_enter_full_retention()
145 omap_prm_clear_mod_irqs(CORE_MOD, PM_WKST1, ~0); in omap2_enter_mpu_retention()
146 omap_prm_clear_mod_irqs(CORE_MOD, OMAP24XX_PM_WKST2, ~0); in omap2_enter_mpu_retention()
Domap_hwmod_2420_data.c104 .module_offs = CORE_MOD,
124 .module_offs = CORE_MOD,
155 .module_offs = CORE_MOD,
183 .module_offs = CORE_MOD,
199 .module_offs = CORE_MOD,
229 .module_offs = CORE_MOD,
243 .module_offs = CORE_MOD,
Dcm2xxx.c331 f1 = omap2_cm_read_mod_reg(CORE_MOD, CM_FCLKEN1); in omap2xxx_cm_fclks_active()
332 f2 = omap2_cm_read_mod_reg(CORE_MOD, OMAP24XX_CM_FCLKEN2); in omap2xxx_cm_fclks_active()
342 l = omap2_cm_read_mod_reg(CORE_MOD, CM_FCLKEN1); in omap2xxx_cm_mpu_retention_allowed()
348 l = omap2_cm_read_mod_reg(CORE_MOD, OMAP24XX_CM_FCLKEN2); in omap2xxx_cm_mpu_retention_allowed()
377 tmp = omap2_cm_read_mod_reg(CORE_MOD, CM_CLKSEL1) & in omap2xxx_cm_set_mod_dividers()
379 omap2_cm_write_mod_reg(core | tmp, CORE_MOD, CM_CLKSEL1); in omap2xxx_cm_set_mod_dividers()
Domap_hwmod_3xxx_data.c295 .module_offs = CORE_MOD,
310 .module_offs = CORE_MOD,
396 .module_offs = CORE_MOD,
411 .module_offs = CORE_MOD,
473 .module_offs = CORE_MOD,
653 .module_offs = CORE_MOD,
668 .module_offs = CORE_MOD,
683 .module_offs = CORE_MOD,
873 .module_offs = CORE_MOD,
919 .module_offs = CORE_MOD,
[all …]
Dprm3xxx.c279 CORE_MOD, OMAP2_RM_RSTCTRL); in omap3_prm_reset_modem()
280 omap2_prm_write_mod_reg(0, CORE_MOD, OMAP2_RM_RSTCTRL); in omap3_prm_reset_modem()
356 omap2_prm_write_mod_reg(0, CORE_MOD, OMAP3430_PM_IVAGRPSEL1); in omap3_prm_init_pm()
357 omap2_prm_write_mod_reg(0, CORE_MOD, OMAP3430ES2_PM_IVAGRPSEL3); in omap3_prm_init_pm()
364 omap2_prm_write_mod_reg(0xffffffff, CORE_MOD, OMAP2_RM_RSTST); in omap3_prm_init_pm()
Dpowerdomains3xxx_data.c100 .prcm_offs = CORE_MOD,
117 .prcm_offs = CORE_MOD,
139 .prcm_offs = CORE_MOD,
Dpowerdomains2xxx_data.c61 .prcm_offs = CORE_MOD,
Dpm34xx.c157 c += omap_prm_clear_mod_irqs(CORE_MOD, 1, ~0); in _prcm_int_handle_wakeup()
160 c += omap_prm_clear_mod_irqs(CORE_MOD, 3, ~0); in _prcm_int_handle_wakeup()
Dprcm-common.h27 #define CORE_MOD 0x200 macro
Dsleep34xx.S43 #define PM_PREPWSTST_CORE_P OMAP3430_PRM_BASE + CORE_MOD +\
46 #define CM_IDLEST1_CORE_V OMAP34XX_CM_REGADDR(CORE_MOD, CM_IDLEST1)