Searched refs:CNL_DPLL_CFGCR0 (Results 1 – 3 of 3) sorted by relevance
1989 I915_WRITE(CNL_DPLL_CFGCR0(id), val); in cnl_ddi_pll_enable()1992 POSTING_READ(CNL_DPLL_CFGCR0(id)); in cnl_ddi_pll_enable()2113 val = I915_READ(CNL_DPLL_CFGCR0(id)); in cnl_ddi_pll_get_hw_state()
1376 cfgcr0 = I915_READ(CNL_DPLL_CFGCR0(pll_id)); in cnl_calc_wrpll_link()1488 cfgcr0 = I915_READ(CNL_DPLL_CFGCR0(pll_id)); in cnl_ddi_clock_get()
9493 #define CNL_DPLL_CFGCR0(pll) _MMIO_PLL(pll, _CNL_DPLL0_CFGCR0, _CNL_DPLL1_CFGCR0) macro