Searched refs:CLK_WDT (Results 1 – 18 of 18) sorted by relevance
/Linux-v4.19/include/dt-bindings/clock/ |
D | exynos5410.h | 53 #define CLK_WDT 316 macro
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D | exynos5250.h | 142 #define CLK_WDT 336 macro
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D | s5pv210.h | 159 #define CLK_WDT 138 macro
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D | exynos5420.h | 111 #define CLK_WDT 316 macro
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D | exynos4.h | 186 #define CLK_WDT 345 macro
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D | exynos3250.h | 155 #define CLK_WDT 146 macro
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/Linux-v4.19/drivers/clk/samsung/ |
D | clk-exynos5410.c | 171 GATE(CLK_WDT, "wdt", "aclk66", GATE_IP_PERIS, 19, 0, 0),
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D | clk-exynos4.c | 1092 GATE(CLK_WDT, "watchdog", "aclk100", E4210_GATE_IP_PERIR, 14, 1142 GATE(CLK_WDT, "watchdog", "aclk100", E4X12_GATE_IP_PERIR, 14, 0, 0),
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D | clk-s5pv210.c | 613 GATE(CLK_WDT, "watchdog", "dout_pclkp", CLK_GATE_IP3, 22, 0, 0),
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D | clk-exynos5250.c | 667 GATE(CLK_WDT, "wdt", "div_aclk66", GATE_IP_PERIS, 19, 0, 0),
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D | clk-exynos3250.c | 480 GATE(CLK_WDT, "wdt", "div_aclk_100", GATE_IP_PERIR, 14, 0, 0),
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D | clk-exynos5420.c | 1160 GATE(CLK_WDT, "wdt", "aclk66_psgen", GATE_IP_PERIS, 19, 0, 0),
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/Linux-v4.19/arch/arm/boot/dts/ |
D | exynos4210.dtsi | 135 clocks = <&clock CLK_WDT>;
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D | exynos5410.dtsi | 436 clocks = <&clock CLK_WDT>;
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D | s5pv210.dtsi | 315 clocks = <&clocks CLK_WDT>;
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D | exynos4412.dtsi | 271 clocks = <&clock CLK_WDT>;
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D | exynos5250.dtsi | 273 clocks = <&clock CLK_WDT>;
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D | exynos5420.dtsi | 1550 clocks = <&clock CLK_WDT>;
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