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Searched refs:CLK_WDT (Results 1 – 18 of 18) sorted by relevance

/Linux-v4.19/include/dt-bindings/clock/
Dexynos5410.h53 #define CLK_WDT 316 macro
Dexynos5250.h142 #define CLK_WDT 336 macro
Ds5pv210.h159 #define CLK_WDT 138 macro
Dexynos5420.h111 #define CLK_WDT 316 macro
Dexynos4.h186 #define CLK_WDT 345 macro
Dexynos3250.h155 #define CLK_WDT 146 macro
/Linux-v4.19/drivers/clk/samsung/
Dclk-exynos5410.c171 GATE(CLK_WDT, "wdt", "aclk66", GATE_IP_PERIS, 19, 0, 0),
Dclk-exynos4.c1092 GATE(CLK_WDT, "watchdog", "aclk100", E4210_GATE_IP_PERIR, 14,
1142 GATE(CLK_WDT, "watchdog", "aclk100", E4X12_GATE_IP_PERIR, 14, 0, 0),
Dclk-s5pv210.c613 GATE(CLK_WDT, "watchdog", "dout_pclkp", CLK_GATE_IP3, 22, 0, 0),
Dclk-exynos5250.c667 GATE(CLK_WDT, "wdt", "div_aclk66", GATE_IP_PERIS, 19, 0, 0),
Dclk-exynos3250.c480 GATE(CLK_WDT, "wdt", "div_aclk_100", GATE_IP_PERIR, 14, 0, 0),
Dclk-exynos5420.c1160 GATE(CLK_WDT, "wdt", "aclk66_psgen", GATE_IP_PERIS, 19, 0, 0),
/Linux-v4.19/arch/arm/boot/dts/
Dexynos4210.dtsi135 clocks = <&clock CLK_WDT>;
Dexynos5410.dtsi436 clocks = <&clock CLK_WDT>;
Ds5pv210.dtsi315 clocks = <&clocks CLK_WDT>;
Dexynos4412.dtsi271 clocks = <&clock CLK_WDT>;
Dexynos5250.dtsi273 clocks = <&clock CLK_WDT>;
Dexynos5420.dtsi1550 clocks = <&clock CLK_WDT>;