Searched refs:CLK_UART0_INTERNAL_DIV (Results 1 – 3 of 3) sorted by relevance
69 #define CLK_UART0_INTERNAL_DIV 76 macro
77 DIV_F(CLK_UART0_INTERNAL_DIV, "uart0_internal_div", "sys_pll_mux",
262 assigned-clocks = <&clk_core CLK_UART0_INTERNAL_DIV>,
