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Searched refs:CLK_TOP_PE2_MAC_P0_SEL (Results 1 – 3 of 3) sorted by relevance

/Linux-v4.19/include/dt-bindings/clock/
Dmt2712-clk.h170 #define CLK_TOP_PE2_MAC_P0_SEL 131 macro
/Linux-v4.19/Documentation/devicetree/bindings/pci/
Dmediatek-pcie.txt159 clocks = <&topckgen CLK_TOP_PE2_MAC_P0_SEL>,
/Linux-v4.19/drivers/clk/mediatek/
Dclk-mt2712.c814 MUX_GATE(CLK_TOP_PE2_MAC_P0_SEL, "pe2_mac_p0_sel",