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Searched refs:CLK_TOP_MUX_AUD_1 (Results 1 – 2 of 2) sorted by relevance

/Linux-v4.19/include/dt-bindings/clock/
Dmt6797-clk.h45 #define CLK_TOP_MUX_AUD_1 27 macro
/Linux-v4.19/drivers/clk/mediatek/
Dclk-mt6797.c369 MUX_GATE(CLK_TOP_MUX_AUD_1, "aud_1_sel", aud_1_parents,