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Searched refs:CLK_TOP_MEM_SEL (Results 1 – 10 of 10) sorted by relevance

/Linux-v4.19/include/dt-bindings/clock/
Dmt8135-clk.h97 #define CLK_TOP_MEM_SEL 78 macro
Dmt7622-clk.h77 #define CLK_TOP_MEM_SEL 57 macro
Dmt8173-clk.h101 #define CLK_TOP_MEM_SEL 83 macro
Dmt2712-clk.h139 #define CLK_TOP_MEM_SEL 100 macro
Dmt2701-clk.h97 #define CLK_TOP_MEM_SEL 78 macro
/Linux-v4.19/drivers/clk/mediatek/
Dclk-mt7622.c525 MUX_GATE(CLK_TOP_MEM_SEL, "mem_sel", mem_parents,
649 clk_prepare_enable(clk_data->clks[CLK_TOP_MEM_SEL]); in mtk_topckgen_init()
Dclk-mt8173.c551 MUX(CLK_TOP_MEM_SEL, "mem_sel", mem_parents, 0x0040, 8, 1),
926 clk_prepare_enable(mt8173_top_clk_data->clks[CLK_TOP_MEM_SEL]); in mtk_clk_enable_critical()
Dclk-mt8135.c383 MUX_GATE(CLK_TOP_MEM_SEL, "mem_sel", mem_parents, 0x0158, 0, 2, 7),
Dclk-mt2701.c503 MUX_GATE_FLAGS(CLK_TOP_MEM_SEL, "mem_sel", mem_parents,
Dclk-mt2712.c744 MUX_GATE_FLAGS(CLK_TOP_MEM_SEL, "mem_sel", mem_parents, 0x040, 8, 1,