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Searched refs:CLK_TOP_HDCP_24M_SEL (Results 1 – 4 of 4) sorted by relevance

/Linux-v4.19/include/dt-bindings/clock/
Dmt8173-clk.h137 #define CLK_TOP_HDCP_24M_SEL 119 macro
Dmt2712-clk.h175 #define CLK_TOP_HDCP_24M_SEL 136 macro
/Linux-v4.19/drivers/clk/mediatek/
Dclk-mt2712.c825 MUX_GATE(CLK_TOP_HDCP_24M_SEL, "hdcp_24m_sel",
Dclk-mt8173.c600 MUX_GATE(CLK_TOP_HDCP_24M_SEL, "hdcp_24m_sel", hdcp_24m_parents, 0x00d0, 16, 2, 23),