Searched refs:CLK_TOP_CCI400_SEL (Results 1 – 6 of 6) sorted by relevance
/Linux-v4.19/include/dt-bindings/clock/ |
D | mt8173-clk.h | 126 #define CLK_TOP_CCI400_SEL 108 macro
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D | mt2712-clk.h | 163 #define CLK_TOP_CCI400_SEL 124 macro
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/Linux-v4.19/Documentation/devicetree/bindings/media/ |
D | mediatek-vcodec.txt | 55 <&topckgen CLK_TOP_CCI400_SEL>,
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/Linux-v4.19/drivers/clk/mediatek/ |
D | clk-mt8173.c | 586 MUX_GATE(CLK_TOP_CCI400_SEL, "cci400_sel", cci400_parents, 0x00a0, 16, 3, 23), 928 clk_prepare_enable(mt8173_top_clk_data->clks[CLK_TOP_CCI400_SEL]); in mtk_clk_enable_critical()
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D | clk-mt2712.c | 798 MUX_GATE(CLK_TOP_CCI400_SEL, "cci400_sel",
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/Linux-v4.19/arch/arm64/boot/dts/mediatek/ |
D | mt8173.dtsi | 1284 <&topckgen CLK_TOP_CCI400_SEL>,
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