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Searched refs:CLK_TOP_AXI_SEL (Results 1 – 12 of 12) sorted by relevance

/Linux-v4.19/include/dt-bindings/clock/
Dmt8135-clk.h81 #define CLK_TOP_AXI_SEL 62 macro
Dmt7622-clk.h76 #define CLK_TOP_AXI_SEL 56 macro
Dmt8173-clk.h100 #define CLK_TOP_AXI_SEL 82 macro
Dmt2712-clk.h138 #define CLK_TOP_AXI_SEL 99 macro
Dmt2701-clk.h98 #define CLK_TOP_AXI_SEL 79 macro
/Linux-v4.19/drivers/clk/mediatek/
Dclk-mt7622.c523 MUX_GATE(CLK_TOP_AXI_SEL, "axi_sel", axi_parents,
648 clk_prepare_enable(clk_data->clks[CLK_TOP_AXI_SEL]); in mtk_topckgen_init()
Dclk-mt8135.c360 MUX_GATE(CLK_TOP_AXI_SEL, "axi_sel", axi_parents,
Dclk-mt2701.c501 MUX_GATE_FLAGS(CLK_TOP_AXI_SEL, "axi_sel", axi_parents,
Dclk-mt2712.c742 MUX_GATE_FLAGS(CLK_TOP_AXI_SEL, "axi_sel", axi_parents, 0x040, 0, 3,
Dclk-mt8173.c550 MUX(CLK_TOP_AXI_SEL, "axi_sel", axi_parents, 0x0040, 0, 3),
/Linux-v4.19/arch/arm64/boot/dts/mediatek/
Dmt7622.dtsi240 <&topckgen CLK_TOP_AXI_SEL>;
642 <&topckgen CLK_TOP_AXI_SEL>;
Dmt8173.dtsi793 <&topckgen CLK_TOP_AXI_SEL>;
803 <&topckgen CLK_TOP_AXI_SEL>;