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Searched refs:CLK_TOP_A1SYS_HP_SEL (Results 1 – 6 of 6) sorted by relevance

/Linux-v4.19/include/dt-bindings/clock/
Dmt7622-clk.h90 #define CLK_TOP_A1SYS_HP_SEL 70 macro
Dmt2712-clk.h180 #define CLK_TOP_A1SYS_HP_SEL 141 macro
/Linux-v4.19/arch/arm64/boot/dts/mediatek/
Dmt2712e.dtsi287 <&topckgen CLK_TOP_A1SYS_HP_SEL>,
Dmt7622.dtsi617 assigned-clocks = <&topckgen CLK_TOP_A1SYS_HP_SEL>,
/Linux-v4.19/drivers/clk/mediatek/
Dclk-mt7622.c557 MUX_GATE(CLK_TOP_A1SYS_HP_SEL, "a1sys_hp_sel", a1sys_hp_parents,
Dclk-mt2712.c836 MUX_GATE(CLK_TOP_A1SYS_HP_SEL, "a1sys_hp_sel",