Searched refs:CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOCK (Results 1 – 3 of 3) sorted by relevance
620 #define CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOCK 110 macro
1584 <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOCK>,
2277 GATE(CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOCK,