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Searched refs:CLK_MM_MDP_RSZ2 (Results 1 – 8 of 8) sorted by relevance

/Linux-v4.19/drivers/clk/mediatek/
Dclk-mt6797-mm.c61 GATE_MM0(CLK_MM_MDP_RSZ2, "mm_mdp_rsz2", "mm_sel", 8),
Dclk-mt2712-mm.c77 GATE_MM0(CLK_MM_MDP_RSZ2, "mm_mdp_rsz2", "mm_sel", 7),
Dclk-mt8173.c803 GATE_MM0(CLK_MM_MDP_RSZ2, "mm_mdp_rsz2", "mm_sel", 7),
/Linux-v4.19/include/dt-bindings/clock/
Dmt6797-clk.h231 #define CLK_MM_MDP_RSZ2 9 macro
Dmt8173-clk.h263 #define CLK_MM_MDP_RSZ2 8 macro
Dmt2712-clk.h315 #define CLK_MM_MDP_RSZ2 7 macro
/Linux-v4.19/Documentation/devicetree/bindings/media/
Dmediatek-mdp.txt74 clocks = <&mmsys CLK_MM_MDP_RSZ2>;
/Linux-v4.19/arch/arm64/boot/dts/mediatek/
Dmt8173.dtsi929 clocks = <&mmsys CLK_MM_MDP_RSZ2>;