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Searched refs:CLK_MM_DISP_SPLIT0 (Results 1 – 5 of 5) sorted by relevance

/Linux-v4.19/drivers/clk/mediatek/
Dclk-mt2712-mm.c98 GATE_MM0(CLK_MM_DISP_SPLIT0, "mm_disp_split0", "mm_sel", 28),
Dclk-mt8173.c823 GATE_MM0(CLK_MM_DISP_SPLIT0, "mm_disp_split0", "mm_sel", 28),
/Linux-v4.19/include/dt-bindings/clock/
Dmt8173-clk.h283 #define CLK_MM_DISP_SPLIT0 28 macro
Dmt2712-clk.h336 #define CLK_MM_DISP_SPLIT0 28 macro
/Linux-v4.19/arch/arm64/boot/dts/mediatek/
Dmt8173.dtsi1073 clocks = <&mmsys CLK_MM_DISP_SPLIT0>;