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Searched refs:CLK_MCU_MP0_SEL (Results 1 – 3 of 3) sorted by relevance

/Linux-v4.19/arch/arm64/boot/dts/mediatek/
Dmt2712e.dtsi87 clocks = <&mcucfg CLK_MCU_MP0_SEL>,
100 clocks = <&mcucfg CLK_MCU_MP0_SEL>,
/Linux-v4.19/include/dt-bindings/clock/
Dmt2712-clk.h296 #define CLK_MCU_MP0_SEL 0 macro
/Linux-v4.19/drivers/clk/mediatek/
Dclk-mt2712.c931 MUX_GATE_FLAGS(CLK_MCU_MP0_SEL, "mcu_mp0_sel", mcu_mp0_parents, 0x7A0,