Searched refs:CLK_BDP_WR_DI_PXL (Results 1 – 2 of 2) sorted by relevance
80 GATE_BDP0(CLK_BDP_WR_DI_PXL, "wr_di_pxl", "di_sel", 26),
466 #define CLK_BDP_WR_DI_PXL 27 macro
