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Searched refs:CLK_BDP_WR_CHANNEL_DI_PXL (Results 1 – 2 of 2) sorted by relevance

/Linux-v4.19/drivers/clk/mediatek/
Dclk-mt2712-bdp.c55 GATE_BDP(CLK_BDP_WR_CHANNEL_DI_PXL, "bdp_di_pxl", "di_sel", 19),
/Linux-v4.19/include/dt-bindings/clock/
Dmt2712-clk.h401 #define CLK_BDP_WR_CHANNEL_DI_PXL 16 macro