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Searched refs:CHL_INT0_MSK (Results 1 – 3 of 3) sorted by relevance

/Linux-v4.19/drivers/scsi/hisi_sas/
Dhisi_sas_v1_hw.c183 #define CHL_INT0_MSK (PORT_BASE + 0x1bc) macro
1448 hisi_sas_phy_write32(hisi_hba, phy_no, CHL_INT0_MSK, 0x3ce3ee); in int_phyup_v1_hw()
1494 irq_mask_old = hisi_sas_phy_read32(hisi_hba, phy_no, CHL_INT0_MSK); in int_abnormal_v1_hw()
1495 hisi_sas_phy_write32(hisi_hba, phy_no, CHL_INT0_MSK, 0x3fffff); in int_abnormal_v1_hw()
1530 hisi_sas_phy_write32(hisi_hba, phy_no, CHL_INT0_MSK, in int_abnormal_v1_hw()
1533 hisi_sas_phy_write32(hisi_hba, phy_no, CHL_INT0_MSK, in int_abnormal_v1_hw()
1771 hisi_sas_phy_write32(hisi_hba, i, CHL_INT0_MSK, 0x3ce3ee); in interrupt_openall_v1_hw()
1776 hisi_sas_phy_write32(hisi_hba, i, CHL_INT0_MSK, in interrupt_openall_v1_hw()
Dhisi_sas_v3_hw.c182 #define CHL_INT0_MSK (PORT_BASE + 0x1c0) macro
Dhisi_sas_v2_hw.c250 #define CHL_INT0_MSK (PORT_BASE + 0x1c0) macro