Searched refs:CFGCHIP (Results 1 – 5 of 5) sorted by relevance
/Linux-v4.19/drivers/phy/ti/ |
D | phy-da8xx-usb.c | 47 regmap_write_bits(d_phy->regmap, CFGCHIP(2), CFGCHIP2_USB1SUSPENDM, in da8xx_usb11_phy_power_on() 57 regmap_write_bits(d_phy->regmap, CFGCHIP(2), CFGCHIP2_USB1SUSPENDM, 0); in da8xx_usb11_phy_power_off() 79 regmap_write_bits(d_phy->regmap, CFGCHIP(2), CFGCHIP2_OTGPWRDN, 0); in da8xx_usb20_phy_power_on() 88 regmap_write_bits(d_phy->regmap, CFGCHIP(2), CFGCHIP2_OTGPWRDN, in da8xx_usb20_phy_power_off() 115 regmap_write_bits(d_phy->regmap, CFGCHIP(2), CFGCHIP2_OTGMODE_MASK, in da8xx_usb20_phy_set_mode() 215 regmap_write_bits(d_phy->regmap, CFGCHIP(2), in da8xx_usb_phy_probe()
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/Linux-v4.19/drivers/clk/davinci/ |
D | da8xx-cfgchip.c | 130 .cfgchip = CFGCHIP(1), 152 .cfgchip = CFGCHIP(3), 274 .cfgchip = CFGCHIP(3), 296 .cfgchip = CFGCHIP(3), 392 regmap_write_bits(usb0->regmap, CFGCHIP(2), mask, val); in da8xx_usb0_clk48_enable() 393 ret = regmap_read_poll_timeout(usb0->regmap, CFGCHIP(2), val, in da8xx_usb0_clk48_enable() 407 regmap_write_bits(usb0->regmap, CFGCHIP(2), val, val); in da8xx_usb0_clk48_disable() 415 regmap_read(usb0->regmap, CFGCHIP(2), &val); in da8xx_usb0_clk48_is_enabled() 460 regmap_write_bits(usb0->regmap, CFGCHIP(2), mask, val); in da8xx_usb0_clk48_recalc_rate() 476 return regmap_write_bits(usb0->regmap, CFGCHIP(2), in da8xx_usb0_clk48_set_parent() [all …]
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D | pll-da850.c | 30 .unlock_reg = CFGCHIP(0), 161 .unlock_reg = CFGCHIP(3),
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/Linux-v4.19/Documentation/devicetree/bindings/clock/ti/davinci/ |
D | da8xx-cfgchip.txt | 1 Binding for TI DA8XX/OMAP-L13X/AM17XX/AM18XX CFGCHIP clocks 7 All of the clock nodes described below must be child nodes of a CFGCHIP node
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/Linux-v4.19/include/linux/mfd/ |
D | da8xx-cfgchip.h | 23 #define CFGCHIP(n) ((n) * 4) macro
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