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Searched refs:BIT_1 (Results 1 – 25 of 33) sorted by relevance

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/Linux-v4.19/drivers/scsi/
Dqla1280.h27 #define BIT_1 0x2 macro
130 #define ISP_CFG0_1020A BIT_1 /* ISP1020A */
144 #define ISP_EN_INT BIT_1 /* ISP enable interrupts. */
151 #define PCI_INT BIT_1 /* PCI interrupt */
156 #define NV_SELECT BIT_1
168 #define CDMA_CONF_BENAB BIT_1 /* Bus burst enable */
185 #define DDMA_CONF_BENAB BIT_1 /* Bus burst enable */
575 #define RF_FULL BIT_1 /* Full */
973 #define OF_ENABLE_TAG BIT_1 /* Tagged queue action enable */
Dqla1280.c1152 mr = BIT_3 | BIT_2 | BIT_1 | BIT_0; in qla1280_set_target_parameters()
1728 err = qla1280_mailbox_command(ha, BIT_0 | BIT_1 | BIT_2, mb); in qla1280_load_firmware_pio()
1800 BIT_1 | BIT_0, mb); in qla1280_load_firmware_dma()
1817 BIT_1 | BIT_0, mb); in qla1280_load_firmware_dma()
1862 err = qla1280_mailbox_command(ha, BIT_1 | BIT_0, mb); in qla1280_start_firmware()
1872 err = qla1280_mailbox_command(ha, BIT_1 | BIT_0, &mb[0]); in qla1280_start_firmware()
1939 BIT_3 | BIT_2 | BIT_1 | BIT_0, in qla1280_init_rings()
1953 BIT_3 | BIT_2 | BIT_1 | BIT_0, in qla1280_init_rings()
2173 status = qla1280_mailbox_command(ha, BIT_1 | BIT_0, &mb[0]); in qla1280_config_bus()
2247 BIT_7 | BIT_3 | BIT_2 | BIT_1 | BIT_0); in qla1280_nvram_config()
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/Linux-v4.19/drivers/scsi/qla2xxx/
Dqla_fw.h29 #define PDO_FORCE_ADISC BIT_1
41 #define PDF_HARD_ADDR BIT_1
452 #define BD_READ_DATA BIT_1
491 #define CF_READ_DATA BIT_1
533 #define TMF_READ_DATA BIT_1
911 #define TCF_TARGET_RESET BIT_1
1028 #define CSRX_FLASH_ENABLE BIT_1 /* Flash BIOS Read/Write enable. */
1098 #define GPDX_DATA_INOUT (BIT_1|BIT_0)
1106 #define GPEX_ENABLE (BIT_1|BIT_0)
1229 #define MDBS_ID_ACQUIRED BIT_1
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Dqla_def.h66 #define BIT_1 0x2 macro
150 #define IDC_PEG_HALT_STATUS_CHANGE BIT_1
170 #define QLA83XX_IDC_GRACEFUL_RESET BIT_1
380 #define SRB_LOGIN_COND_PLOGI BIT_1
425 #define SRB_FXDISC_RESP_DMA_VALID BIT_1
592 #define CSR_FLASH_ENABLE BIT_1 /* Flash BIOS Read/Write enable */
610 #define NVR_SELECT BIT_1
867 #define MBX_DMA_OUT BIT_1
880 #define MBX_DMA_OUT BIT_1
995 #define FO1_AE_ALL_LIP_RESET BIT_1
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Dqla_nvme.h63 #define CF_READ_DATA BIT_1
Dqla_tmpl.h59 #define CAPTURE_FLAG_PHYS_VIRT BIT_1
Dqla_init.c3682 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0); in qla2x00_update_fw_options()
3686 (BIT_3 | BIT_2 | BIT_1 | BIT_0); in qla2x00_update_fw_options()
3696 ((rx_sens & (BIT_1 | BIT_0)) << 2) | in qla2x00_update_fw_options()
3697 (tx_sens & (BIT_1 | BIT_0)); in qla2x00_update_fw_options()
3702 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0); in qla2x00_update_fw_options()
3704 (BIT_3 | BIT_2 | BIT_1 | BIT_0); in qla2x00_update_fw_options()
3714 ((rx_sens & (BIT_1 | BIT_0)) << 2) | in qla2x00_update_fw_options()
3715 (tx_sens & (BIT_1 | BIT_0)); in qla2x00_update_fw_options()
3995 mid_init_cb->options = cpu_to_le16(BIT_1); in qla2x00_init_rings()
4409 nv->firmware_options[0] = BIT_2 | BIT_1; in qla2x00_nvram_config()
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Dqla_target.h238 #define ATIO_EXEC_READ BIT_1
486 #define CTIO7_FLAGS_DATA_IN BIT_1 /* data to initiator */
853 TRC_DO_WORK = BIT_1,
Dqla_mbx.c2218 mcp->mb[1] = BIT_1; in qla2x00_lip_reset()
2354 if (opt & BIT_1) in qla24xx_login_fabric()
2414 mb[1] |= BIT_1; in qla24xx_login_fabric()
2423 mb[10] |= BIT_1; /* Class 3. */ in qla24xx_login_fabric()
3766 mcp->mb[3] = port_speed & (BIT_5|BIT_4|BIT_3|BIT_2|BIT_1|BIT_0); in qla2x00_set_idma_speed()
3768 mcp->mb[3] = port_speed & (BIT_2|BIT_1|BIT_0); in qla2x00_set_idma_speed()
4118 rval = BIT_1; in qla2x00_send_change_request()
4121 rval = BIT_1; in qla2x00_send_change_request()
5346 mcp->mb[2] = BIT_1; in qla24xx_set_fcp_prio()
6381 addr, offset, SFP_BLOCK_SIZE, BIT_1); in qla2x00_read_sfp_dev()
Dqla_mid.c855 options |= BIT_1; in qla25xx_create_rsp_que()
Dqla_target.c6616 fc4_feature = BIT_1; in qlt_rff_id()
6618 fc4_feature = BIT_0 | BIT_1; in qlt_rff_id()
6854 tmp &= ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); in qlt_24xx_config_nvram_stage2()
6965 tmp &= ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); in qlt_81xx_config_nvram_stage2()
Dqla_isr.c1395 else if (le16_to_cpu(mbx->mb1) & BIT_1) in qla2x00_mbx_iocb_entry()
2451 if (unlikely((state_flags & BIT_1) && (sp->type == SRB_BIDI_CMD))) { in qla2x00_status_entry()
/Linux-v4.19/drivers/net/ethernet/qlogic/qlcnic/
Dqlcnic_hw.h141 #define QLCNIC_GET_OWNER(val) ((val) & (BIT_0 | BIT_1))
Dqlcnic_hdr.h197 #define BIT_1 0x2 macro
494 #define TA_CTL_ENABLE BIT_1
Dqlcnic_ctx.c1347 arg2 |= (BIT_0 | BIT_1); in qlcnic_config_switch_port()
1359 arg2 &= ~(BIT_1 | BIT_2 | BIT_3); in qlcnic_config_switch_port()
1360 if (!(esw_cfg->offload_flags & BIT_1)) in qlcnic_config_switch_port()
Dqlcnic_83xx_hw.h532 #define QLC_REGISTER_DCB_AEN BIT_1
Dqlcnic.h916 #define QLCNIC_FW_CAPABILITY_TSO BIT_1
932 #define QLCNIC_83XX_FW_CAPAB_ENCAP_TX_OFFLOAD BIT_1
1321 #define QLCNIC_SWITCH_ENABLE BIT_1
Dqlcnic_hw.c820 #define QLCNIC_ENABLE_IPV6_LRO (BIT_1 | BIT_9)
1038 if (!(offload_flags & BIT_1)) in qlcnic_process_flags()
Dqlcnic_minidump.c25 #define QLCNIC_DUMP_RWCRB BIT_1
753 if (dma_sts & BIT_1) in qlcnic_start_pex_dma()
Dqlcnic_sriov_pf.c391 cmd.req.arg[1] = ((func & 0xf) << 2) | BIT_6 | BIT_1; in qlcnic_sriov_pf_cfg_eswitch()
702 cmd.req.arg[2] |= BIT_1 | BIT_3 | BIT_8; in qlcnic_sriov_set_vf_acl()
Dqlcnic_83xx_hw.c2019 lro_bit_mask = (mode ? (BIT_0 | BIT_1 | BIT_2 | BIT_3) : 0); in qlcnic_83xx_config_hw_lro()
3533 cmd.req.arg[1] = BIT_1 | (adapter->tx_ring->ctx_id << 16); in qlcnic_83xx_get_stats()
3564 #define QLCNIC_83XX_ADD_PORT1 BIT_1
Dqlcnic_83xx_init.c1023 #define QLC_83XX_ENCAP_TYPE_VXLAN BIT_1
/Linux-v4.19/drivers/scsi/qla4xxx/
Dql4_def.h83 #define BIT_1 0x2 macro
Dql4_os.c3510 sess->erl |= BIT_1; in qla4xxx_copy_from_fwddb_param()
3523 conn->tcp_timer_scale |= BIT_1; in qla4xxx_copy_from_fwddb_param()
3641 SET_BITVAL(sess->erl & BIT_1, options, BIT_1); in qla4xxx_copy_to_fwddb_param()
3650 SET_BITVAL(conn->tcp_timer_scale & BIT_1, options, BIT_2); in qla4xxx_copy_to_fwddb_param()
3651 SET_BITVAL(conn->tcp_timer_scale & BIT_0, options, BIT_1); in qla4xxx_copy_to_fwddb_param()
3747 sess->erl |= BIT_1; in qla4xxx_copy_to_sess_conn_params()
3760 conn->tcp_timer_scale |= BIT_1; in qla4xxx_copy_to_sess_conn_params()
8885 if (PCI_FUNC(ha->pdev->devfn) & BIT_1) in qla4xxx_prevent_other_port_reinit()
Dql4_fw.h62 #define HSRX_RISC_IOCB_INT BIT_1 /* RISC to Host IOCB interrupt */

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