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Searched refs:BIT2 (Results 1 – 25 of 46) sorted by relevance

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/Linux-v4.19/drivers/scsi/
Ddc395x.h74 #define BIT2 0x00000004 macro
81 #define FORMATING_MEDIA BIT2
87 #define ASPI_SUPPORT BIT2
123 #define RESET_DONE BIT2
131 #define OVER_RUN BIT2
141 #define RESET_DEV0 BIT2
176 #define WIDE_NEGO_ENABLE BIT2
632 #define RST_SCSI_BUS BIT2
/Linux-v4.19/drivers/staging/rtl8192e/rtl8192e/
Dr8192E_hw.h140 #define RCR_FILTER_MASK (BIT0 | BIT1 | BIT2 | BIT3 | BIT5 | BIT12 | \
157 #define RCR_AM BIT2
213 #define SCR_TxEncEnable BIT2
236 #define IMR_VIDOK BIT2
243 #define TPPoll_VIQ BIT2
283 #define AcmHw_ViqEn BIT2
291 #define AcmFw_VoqStatus BIT2
344 #define BW_OPMODE_20MHZ BIT2
373 #define RRSR_5_5M BIT2
/Linux-v4.19/drivers/staging/rtl8723bs/include/
Drtw_ht.h71 #define LDPC_HT_TEST_TX_ENABLE BIT2
76 #define STBC_HT_TEST_TX_ENABLE BIT2
81 #define BEAMFORMING_HT_BEAMFORMER_TEST BIT2 /* Transmiting Beamforming no matter the target suppo…
Dhal_com_reg.h610 #define RRSR_5_5M BIT2
635 #define HAL92C_WOL_DISASSOC_EVENT BIT2
727 #define BW_OPMODE_20MHZ BIT2
761 #define WOW_MAGIC BIT2 /* Magic packet */
802 #define IMR_VIDOK BIT2 /* AC_VI DMA OK Interrupt */
850 #define PHIMR_VODOK BIT2 /* AC_VO DMA Interrupt */
901 #define UHIMR_VODOK BIT2 /* AC_VO DMA Interrupt */
955 #define IMR_VODOK_88E BIT2 /* AC_VO DMA OK */
1013 #define StopBE BIT2
1050 #define RCR_AM BIT2 /* Accept multicast packet */
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Dhal_pwr_seq.h48 …AB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, (BIT4|BIT3|BIT2), 0},/* disable SW …
105 …K, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, BIT2}, /*0x04[10] = 1…
183 …_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, 0},/*Reset CPU*/ \
208 …MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, 0},/* Enable CPU*/…
210 …, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, BIT2},/* Enable CPU*/…
Drtl8723b_spec.h224 #define IMR_VODOK_8723B BIT2 /* AC_VO DMA OK */
/Linux-v4.19/drivers/video/fbdev/via/
Ddvi.c349 BIT0 + BIT1 + BIT2); in dvi_patch_skew_dvp0()
352 BIT0 + BIT1 + BIT2); in dvi_patch_skew_dvp0()
359 BIT0 + BIT1 + BIT2 + BIT3); in dvi_patch_skew_dvp0()
384 BIT0 + BIT1 + BIT2 + BIT3); in dvi_patch_skew_dvp_low()
391 BIT0 + BIT1 + BIT2 + BIT3); in dvi_patch_skew_dvp_low()
Dlcd.c359 viafb_write_reg_mask(CR79, VIACR, 0x07, BIT0 + BIT1 + BIT2); in load_lcd_scaling()
534 BIT0 + BIT1 + BIT2 + BIT3); in lcd_patch_skew()
577 BIT0 + BIT1 + BIT2); in viafb_lcd_set_mode()
760 BIT7 + BIT2 + BIT1 + BIT0); in set_lcd_output_path()
/Linux-v4.19/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/
Dpwrseq.h48 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, 0 \
152 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, 0 \
221 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, 0 \
227 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, BIT2 \
408 PWR_BASEADDR_MAC, PWR_CMD_WRITE, (BIT4|BIT3|BIT2), 0 \
545 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, BIT2 \
/Linux-v4.19/drivers/staging/rtl8723bs/hal/
DHalHWImg8723B_MAC.c20 ((pDM_Odm->BoardType & BIT2) >> 2) << 4; /* _BT */ in CheckPositive()
102 if ((cond1 & BIT2) != 0) /* ALNA */ in CheckPositive()
DHalHWImg8723B_BB.c20 ((pDM_Odm->BoardType & BIT2) >> 2) << 4; /* _BT */ in CheckPositive()
102 if ((cond1 & BIT2) != 0) /* ALNA */ in CheckPositive()
DHalHWImg8723B_RF.c20 ((pDM_Odm->BoardType & BIT2) >> 2) << 4; /* _BT */ in CheckPositive()
108 if ((cond1 & BIT2) != 0) /* ALNA */ in CheckPositive()
DHalBtcOutSrc.h90 #define INTF_NOTIFY BIT2
95 #define ALGO_BT_MONITOR BIT2
107 #define WIFI_HS_CONNECTED BIT2
Dodm_debug.h63 #define ODM_COMP_DYNAMIC_TXPWR BIT2
Dodm.h424 ODM_BB_DYNAMIC_TXPWR = BIT2,
487 ODM_RF_TX_C = BIT2,
533 ODM_SCAN = BIT2,
547 ODM_WM_A = BIT2,
DHalBtc8723b2Ant.h13 #define BT_INFO_8723B_2ANT_B_INQ_PAGE BIT2
/Linux-v4.19/drivers/net/wireless/realtek/rtlwifi/btcoexist/
Dhalbt_precomp.h56 #define BIT2 0x00000004 macro
Dhalbtcoutsrc.h110 #define INTF_NOTIFY BIT2
115 #define ALGO_BT_MONITOR BIT2
127 #define WIFI_HS_CONNECTED BIT2
Dhalbtc8192e2ant.h33 #define BT_INFO_8192E_2ANT_B_INQ_PAGE BIT2
Dhalbtc8821a1ant.h35 #define BT_INFO_8821A_1ANT_B_INQ_PAGE BIT2
Dhalbtc8821a2ant.h35 #define BT_INFO_8821A_2ANT_B_INQ_PAGE BIT2
/Linux-v4.19/drivers/staging/rtlwifi/btcoexist/
Dhalbt_precomp.h43 #define BIT2 0x00000004 macro
Dhalbtcoutsrc.h102 #define INTF_NOTIFY BIT2
107 #define ALGO_BT_MONITOR BIT2
119 #define WIFI_HS_CONNECTED BIT2
/Linux-v4.19/drivers/staging/rtl8192e/
Drtl819x_Qos.h20 #define BIT2 0x00000004 macro
/Linux-v4.19/drivers/char/pcmcia/
Dsynclink_cs.c301 #define IRQ_DCD BIT2 // carrier detect status change
308 #define CEC BIT2 // command executing
313 #define PVR_RI BIT2
690 while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) { in wait_command_complete()
1192 if (gis & (BIT3 | BIT2)) in mgslpc_isr()
1239 if (pis & BIT2) in mgslpc_isr()
2926 val |= BIT2; in enable_auxclk()
2998 val = read_reg(info, CHA + CCR1) | (BIT2 | BIT1 | BIT0); in loopback_enable()
3069 val |= BIT2; in hdlc_mode()
3092 val |= BIT4 | BIT2; in hdlc_mode()
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