Searched refs:BIT16 (Results 1 – 21 of 21) sorted by relevance
75 #define BIT16 0x00010000 macro92 #define TEST_FORCE_ENABLE (BIT18 + BIT16)147 #define EP8_INT BIT16174 #define EP8_EN BIT16196 #define EP0_AUTO BIT16215 #define EP0_PERR_NAK_INT BIT16233 #define EP0_STATUS_RW_BIT (BIT16 | BIT15 | BIT11 | 0xFF)236 #define EP0_PERR_NAK_EN BIT16271 #define EPN_AUTO BIT16304 #define EPN_OUT_EMPTY BIT16 /* R */
624 #define RRSR_MCS4 BIT16752 #define CAM_WRITE BIT16788 #define IMR_TIMEOUT1 BIT16 /* Timeout interrupt 1 */836 #define PHIMR_BCNDOK0 BIT16862 #define PHIMR_BCNDOK4 BIT16887 #define UHIMR_BCNDOK0 BIT16913 #define UHIMR_BCNDOK4 BIT16942 #define IMR_BCNDERR0_88E BIT16 /* Beacon Queue DMA Error 0 */971 #define IMR_BCNDOK3_88E BIT16 /* Beacon Queue DMA OK Interrup 3 */1035 #define RCR_UC_DATA_EN BIT16 /* Unicast data packet interrupt enable. */[all …]
212 #define IMR_BCNDERR0_8723B BIT16 /* Beacon Queue DMA OK0 */240 #define IMR_BCNDOK3_8723B BIT16 /* Beacon Queue DMA OK Interrupt 3 */
37 #define BIT16 0x00010000 macro
61 #define DYNAMIC_MAC_EDCA_TURBO BIT16/* ODM_MAC_EDCA_TURBO */
189 #define CAM_CM_SecCAMWE BIT16204 #define CAM_WRITE BIT16387 #define RRSR_MCS4 BIT16
133 TargetCommand |= BIT31|BIT16; in rtl92e_set_key()
70 #define BIT16 0x00010000 macro
57 #define BIT16 0x00010000 macro
394 #define IMR_BCNDERR0_8723B BIT16 /* Beacon Queue DMA OK0 */422 #define IMR_BCNDOK3_8723B BIT16 /* Beacon Queue DMA OK Interrup 3 */
78 #define ODM_COMP_EDCA_TURBO BIT16
1414 PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, RF_T_METER_NEW, (BIT17 | BIT16), 0x03); in odm_TXPowerTrackingCheckCE()
439 ODM_MAC_EDCA_TURBO = BIT16,
1734 PHY_SetRFReg(padapter, RF_PATH_A, REG_RF_BB_GAIN_OFFSET, BIT18|BIT17|BIT16|BIT15, target); in rtw_bb_rf_gain_offset()
34 #define BIT16 0x00010000 macro
35 #define BIT16 0x00010000 macro
60 #define BIT16 0x00010000 macro
396 #define RRSR_MCS4 BIT16
2450 #define ODM_BIT_CCK_RPT_FORMAT_11AC BIT16
714 #define LPFC_SLI4_INTR16 BIT16
2360 if (gsr & (BIT16 << (i*2))) in slgt_interrupt()
