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Searched refs:BIT12 (Results 1 – 20 of 20) sorted by relevance

/Linux-v4.19/drivers/staging/emxx_udc/
Demxx_udc.h71 #define BIT12 0x00001000 macro
120 #define UFRAME (BIT14 + BIT13 + BIT12)
151 #define EP4_INT BIT12
178 #define EP4_EN BIT12
219 #define EP0_OUT_EMPTY BIT12
361 #define MCYCLE_RST BIT12 /* RW */
397 #define DIRPD BIT12 /* RW */
/Linux-v4.19/drivers/staging/rtl8192e/rtl8192e/
Dr8192E_hw.h140 #define RCR_FILTER_MASK (BIT0 | BIT1 | BIT2 | BIT3 | BIT5 | BIT12 | \
154 #define RCR_AICV BIT12
226 #define IMR_RXFOVW BIT12
253 #define TPPoll_StopVO BIT12
383 #define RRSR_MCS0 BIT12
/Linux-v4.19/drivers/net/wireless/realtek/rtlwifi/btcoexist/
Dhalbt_precomp.h66 #define BIT12 0x00001000 macro
/Linux-v4.19/drivers/staging/rtlwifi/btcoexist/
Dhalbt_precomp.h53 #define BIT12 0x00001000 macro
/Linux-v4.19/drivers/staging/rtl8723bs/include/
Dhal_com_reg.h620 #define RRSR_MCS0 BIT12
792 #define IMR_RXFOVW BIT12 /* Receive FIFO Overflow */
808 #define IMR_BcnInt_E BIT12
840 #define PHIMR_ATIM_CTW_END BIT12
891 #define UHIMR_CTW_END BIT12
916 #define UHIMR_ATIMEND BIT12
945 #define IMR_ATIMEND_88E BIT12 /* CTWidnow End or ATIM Window End */
1039 #define RCR_ACF BIT12 /* Accept control type frame. Control frames BA, BAR, and PS-Poll (when …
Drtl8723b_spec.h215 #define IMR_ATIMEND_8723B BIT12 /* CTWidnow End or ATIM Window End */
Dosdep_service.h33 #define BIT12 0x00001000 macro
Drtw_mlme_ext.h56 #define DYNAMIC_BB_RXHP BIT12/* ODM_BB_RXHP */
/Linux-v4.19/drivers/staging/rtl8723bs/hal/
Dodm_debug.h73 #define ODM_COMP_DYNAMIC_PRICCA BIT12
DHal8723BReg.h397 #define IMR_ATIMEND_8723B BIT12 /* CTWidnow End or ATIM Window End */
Dodm.h434 ODM_BB_RXHP = BIT12,
Dodm_DIG.c946 PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_CCK_FA_RST_11N, BIT12, 1); in odm_FalseAlarmCounterStatistics()
/Linux-v4.19/drivers/staging/rtl8192e/
Drtl819x_Qos.h30 #define BIT12 0x00001000 macro
/Linux-v4.19/include/uapi/linux/
Dsynclink.h31 #define BIT12 0x1000 macro
/Linux-v4.19/drivers/scsi/
Ddc395x.h64 #define BIT12 0x00001000 macro
/Linux-v4.19/drivers/tty/
Dsynclink.c560 #define MISCSTATUS_TXC BIT12
581 #define SICR_TXC_INACTIVE BIT12
582 #define SICR_TXC (BIT13|BIT12)
1844 usc_OutReg(info, PCR, (u16)((usc_InReg(info, PCR) | BIT13) | BIT12)); in shutdown()
4657 (unsigned short)((usc_InReg(info, IOCR) & ~(BIT13|BIT12)) | BIT12)); in usc_set_sdlc_mode()
4691 RegValue |= BIT12; in usc_set_sdlc_mode()
4733 RegValue |= ( BIT12 | BIT10 | BIT9 ); in usc_set_sdlc_mode()
4808 RegValue |= ( BIT12 | BIT10 | BIT9 | BIT8); in usc_set_sdlc_mode()
5139 case HDLC_PREAMBLE_PATTERN_FLAGS: RegValue |= BIT8 | BIT12; break; in usc_set_sdlc_mode()
6014 usc_OutReg(info, PCR, (u16)((usc_InReg(info, PCR) | BIT13) & ~BIT12)); in usc_set_async_mode()
[all …]
Dsynclink_gt.c413 #define IRQ_TXIDLE BIT12
4287 case HDLC_ENCODING_BIPHASE_MARK: val |= BIT12; break; in sync_mode()
4288 case HDLC_ENCODING_BIPHASE_SPACE: val |= BIT12 + BIT10; break; in sync_mode()
4289 case HDLC_ENCODING_BIPHASE_LEVEL: val |= BIT12 + BIT11; break; in sync_mode()
4290 case HDLC_ENCODING_DIFF_BIPHASE_LEVEL: val |= BIT12 + BIT11 + BIT10; break; in sync_mode()
4360 case HDLC_ENCODING_BIPHASE_MARK: val |= BIT12; break; in sync_mode()
4361 case HDLC_ENCODING_BIPHASE_SPACE: val |= BIT12 + BIT10; break; in sync_mode()
4362 case HDLC_ENCODING_BIPHASE_LEVEL: val |= BIT12 + BIT11; break; in sync_mode()
4363 case HDLC_ENCODING_DIFF_BIPHASE_LEVEL: val |= BIT12 + BIT11 + BIT10; break; in sync_mode()
/Linux-v4.19/drivers/net/wireless/realtek/rtlwifi/rtl8192de/
Dreg.h392 #define RRSR_MCS0 BIT12
/Linux-v4.19/drivers/scsi/lpfc/
Dlpfc_hw4.h710 #define LPFC_SLI4_INTR12 BIT12
/Linux-v4.19/drivers/char/pcmcia/
Dsynclink_cs.c293 #define IRQ_UNDERRUN BIT12 // transmit data underrun