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Searched refs:BIT11 (Results 1 – 23 of 23) sorted by relevance

/Linux-v4.19/drivers/staging/emxx_udc/
Demxx_udc.h70 #define BIT11 0x00000800 macro
152 #define EP3_INT BIT11
179 #define EP3_EN BIT11
220 #define EP0_IN_NAK_INT BIT11
233 #define EP0_STATUS_RW_BIT (BIT16 | BIT15 | BIT11 | 0xFF)
239 #define EP0_IN_NAK_EN BIT11
273 #define EPN_IPIDCLR BIT11
336 #define EPN_STOP_MODE BIT11
/Linux-v4.19/drivers/staging/rtl8723bs/include/
Dhal_com_reg.h619 #define RRSR_54M BIT11
793 #define IMR_RDU BIT11 /* Receive Descriptor Unavailable */
809 #define IMR_TXERR BIT11
841 #define PHIMR_HISRE_IND BIT11 /* RO. HISRE Indicator (HISRE & HIMRE is true, this bit is set to …
864 #define PHIMR_TXERR BIT11
917 #define UHIMR_TXERR BIT11
946 #define IMR_HISR1_IND_INT_88E BIT11 /* HISR1 Indicator (HISR1 & HIMR1 is true, this bit is set t…
975 #define IMR_TXERR_88E BIT11 /* Tx Error Flag Interrupt Status, write 1 clear. */
1040 #define RCR_ADF BIT11 /* Accept data type frame. This bit also regulates BA, BAR, and PS-Poll …
Drtl8723b_spec.h244 #define IMR_TXERR_8723B BIT11 /* Tx Error Flag Interrupt Status, write 1 clear. */
Dosdep_service.h32 #define BIT11 0x00000800 macro
Drtw_mlme_ext.h55 #define DYNAMIC_BB_PSD BIT11/* ODM_BB_PSD */
/Linux-v4.19/drivers/staging/rtl8192e/rtl8192e/
Dr8192E_hw.h227 #define IMR_RDU BIT11
252 #define TPPoll_StopVI BIT11
382 #define RRSR_54M BIT11
/Linux-v4.19/drivers/net/wireless/realtek/rtlwifi/btcoexist/
Dhalbt_precomp.h65 #define BIT11 0x00000800 macro
/Linux-v4.19/drivers/staging/rtlwifi/btcoexist/
Dhalbt_precomp.h52 #define BIT11 0x00000800 macro
/Linux-v4.19/drivers/staging/rtl8723bs/hal/
Dodm_RegDefine11N.h162 #define ODM_BIT_BB_ATC_11N BIT11
Dodm_debug.h72 #define ODM_COMP_PSD BIT11
Drtl8723b_rf6052.c65 pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff) | BIT10 | BIT11); in PHY_RF6052SetBandwidth8723B()
DHal8723BReg.h426 #define IMR_TXERR_8723B BIT11 /* Tx Error Flag Interrupt Status, write 1 clear. */
Dodm.h433 ODM_BB_PSD = BIT11,
Dodm_DIG.c230 PHY_SetBBReg(pDM_Odm->Adapter, REG_RD_CTRL, BIT11, 1); /* stop counting if EDCCA is asserted */ in odm_AdaptivityInit()
/Linux-v4.19/drivers/staging/rtl8723bs/core/
Drtw_efuse.c286 rtw_write16(padapter, 0x34, rtw_read16(padapter, 0x34) & (~BIT11)); in efuse_OneByteRead()
352 rtw_write16(padapter, 0x34, rtw_read16(padapter, 0x34) | (BIT11)); in efuse_OneByteWrite()
/Linux-v4.19/drivers/staging/rtl8192e/
Drtl819x_Qos.h29 #define BIT11 0x00000800 macro
/Linux-v4.19/include/uapi/linux/
Dsynclink.h30 #define BIT11 0x0800 macro
/Linux-v4.19/drivers/scsi/
Ddc395x.h65 #define BIT11 0x00000800 macro
/Linux-v4.19/drivers/tty/
Dsynclink_gt.c414 #define IRQ_TXUNDER BIT11 /* HDLC */
4285 case HDLC_ENCODING_NRZI_MARK: val |= BIT11; break; in sync_mode()
4286 case HDLC_ENCODING_NRZI: val |= BIT11 + BIT10; break; in sync_mode()
4289 case HDLC_ENCODING_BIPHASE_LEVEL: val |= BIT12 + BIT11; break; in sync_mode()
4290 case HDLC_ENCODING_DIFF_BIPHASE_LEVEL: val |= BIT12 + BIT11 + BIT10; break; in sync_mode()
4358 case HDLC_ENCODING_NRZI_MARK: val |= BIT11; break; in sync_mode()
4359 case HDLC_ENCODING_NRZI: val |= BIT11 + BIT10; break; in sync_mode()
4362 case HDLC_ENCODING_BIPHASE_LEVEL: val |= BIT12 + BIT11; break; in sync_mode()
4363 case HDLC_ENCODING_DIFF_BIPHASE_LEVEL: val |= BIT12 + BIT11 + BIT10; break; in sync_mode()
Dsynclink.c543 #define TCSR_UNDERWAIT BIT11
561 #define MISCSTATUS_RI_LATCHED BIT11
583 #define SICR_RI_ACTIVE BIT11
585 #define SICR_RI (BIT11|BIT10)
4936 RegValue |= BIT11; in usc_set_sdlc_mode()
5134 case HDLC_PREAMBLE_LENGTH_32BITS: RegValue |= BIT11; break; in usc_set_sdlc_mode()
5135 case HDLC_PREAMBLE_LENGTH_64BITS: RegValue |= BIT11 | BIT10; break; in usc_set_sdlc_mode()
/Linux-v4.19/drivers/net/wireless/realtek/rtlwifi/rtl8192de/
Dreg.h391 #define RRSR_54M BIT11
/Linux-v4.19/drivers/scsi/lpfc/
Dlpfc_hw4.h709 #define LPFC_SLI4_INTR11 BIT11
/Linux-v4.19/drivers/char/pcmcia/
Dsynclink_cs.c294 #define IRQ_TIMER BIT11 // timer interrupt