Searched refs:AXI_MASTER_CFG_BASE (Results 1 – 2 of 2) sorted by relevance
284 #define AXI_MASTER_CFG_BASE (0x5000) macro1428 AXI_MASTER_CFG_BASE + AM_CURR_TRANS_RETURN); in axi_bus_is_idle_v2_hw()1490 axi_val = hisi_sas_read32(hisi_hba, AXI_MASTER_CFG_BASE + in disable_phy_v2_hw()1493 hisi_sas_write32(hisi_hba, AXI_MASTER_CFG_BASE + in disable_phy_v2_hw()1527 hisi_sas_write32(hisi_hba, AXI_MASTER_CFG_BASE + in disable_phy_v2_hw()3468 hisi_sas_write32(hisi_hba, AXI_MASTER_CFG_BASE + AM_CTRL_GLOBAL, 0x1); in soft_reset_v2_hw()3474 AXI_MASTER_CFG_BASE + AM_CURR_TRANS_RETURN); in soft_reset_v2_hw()
211 #define AXI_MASTER_CFG_BASE (0x5000) macro2010 reg_val = hisi_sas_read32(hisi_hba, AXI_MASTER_CFG_BASE + in disable_host_v3_hw()2013 hisi_sas_write32(hisi_hba, AXI_MASTER_CFG_BASE + in disable_host_v3_hw()2017 rc = hisi_sas_read32_poll_timeout(AXI_MASTER_CFG_BASE + in disable_host_v3_hw()
