Searched refs:ASID (Results 1 – 11 of 11) sorted by relevance
/Linux-v4.19/arch/arm64/include/asm/ |
D | tlbflush.h | 129 unsigned long asid = __TLBI_VADDR(0, ASID(mm)); in flush_tlb_mm() 140 unsigned long addr = __TLBI_VADDR(uaddr, ASID(vma->vm_mm)); in flush_tlb_page() 158 unsigned long asid = ASID(vma->vm_mm); in __flush_tlb_range() 214 unsigned long addr = __TLBI_VADDR(uaddr, ASID(mm)); in __flush_tlb_pgtable()
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D | mmu.h | 39 #define ASID(mm) ((mm)->context.id.counter & 0xffff) macro
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D | mmu_context.h | 185 ttbr = virt_to_phys(mm->pgd) | ASID(mm) << 48; in update_saved_ttbr0()
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/Linux-v4.19/arch/arm/include/asm/ |
D | mmu.h | 27 #define ASID(mm) ((unsigned int)((mm)->context.id.counter & ~ASID_MASK)) macro 29 #define ASID(mm) (0) macro
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D | tlbflush.h | 373 const int asid = ASID(mm); in __local_flush_tlb_mm() 391 const int asid = ASID(mm); in local_flush_tlb_mm() 415 tlb_op(TLB_V7_UIS_ASID, "c8, c3, 2", ASID(mm)); in __flush_tlb_mm() 428 uaddr = (uaddr & PAGE_MASK) | ASID(vma->vm_mm); in __local_flush_tlb_page() 449 uaddr = (uaddr & PAGE_MASK) | ASID(vma->vm_mm); in local_flush_tlb_page() 466 uaddr = (uaddr & PAGE_MASK) | ASID(vma->vm_mm); in __flush_tlb_page()
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/Linux-v4.19/arch/arm/mm/ |
D | tlb-v7.S | 41 asid r3, r3 @ mask ASID 50 ALT_SMP(mcr p15, 0, r0, c8, c3, 3) @ TLB invalidate U MVA all ASID (shareable) 79 ALT_SMP(mcr p15, 0, r0, c8, c3, 3) @ TLB invalidate U MVA all ASID (shareable)
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D | tlb-v6.S | 43 asid r3, r3 @ mask ASID
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D | Kconfig | 611 This indicates whether the CPU has the ASID register; used to
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/Linux-v4.19/arch/arm64/ |
D | Kconfig | 524 contains data for a non-current ASID. The fix is to 541 bool "Falkor E1003: Incorrect translation due to ASID change" 544 On Falkor v1, an incorrect ASID may be cached in the TLB when ASID 545 and BADDR are changed together in TTBRx_EL1. Since we keep the ASID 1019 zeroed area and reserved ASID. The user access routines
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/Linux-v4.19/arch/arm/ |
D | Kconfig | 1043 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID" 1047 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the 1052 entries regardless of the ASID. 1080 bool "ARM errata: possible faulty MMU translations following an ASID switch" 1085 which starts prior to an ASID switch but completes afterwards. This 1087 the new ASID. This workaround places two dsb instructions in the mm 1088 switching code so that no page table walks can cross the ASID switch. 1144 which sends an IPI to the CPUs that are running the same ASID
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/Linux-v4.19/Documentation/virtual/kvm/ |
D | amd-memory-encryption.rst | 44 Hence, the ASID for the SEV-enabled guests must be from 1 to a maximum value
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