Searched refs:AR_SREV_9561 (Results 1 – 10 of 10) sorted by relevance
457 #define AR_PHY_SPUR_MASK_A (AR_SM_BASE + (AR_SREV_9561(ah) ? 0x18 : 0x20))458 #define AR_PHY_SPUR_MASK_B (AR_SM_BASE + (AR_SREV_9561(ah) ? 0x1c : 0x24))501 #define AR_PHY_TEST (AR_SM_BASE + (AR_SREV_9561(ah) ? 0x15c : 0x160))512 #define AR_PHY_TEST_CTL_STATUS (AR_SM_BASE + (AR_SREV_9561(ah) ? 0x160 : 0x164))527 #define AR_PHY_TSTDAC (AR_SM_BASE + (AR_SREV_9561(ah) ? 0x164 : 0x168))529 #define AR_PHY_CHAN_STATUS (AR_SM_BASE + (AR_SREV_9561(ah) ? 0x168 : 0x16c))531 #define AR_PHY_CHAN_INFO_MEMORY (AR_SM_BASE + (AR_SREV_9561(ah) ? 0x16c : 0x170))535 #define AR_PHY_CHNINFO_NOISEPWR (AR_SM_BASE + (AR_SREV_9561(ah) ? 0x170 : 0x174))536 #define AR_PHY_CHNINFO_GAINDIFF (AR_SM_BASE + (AR_SREV_9561(ah) ? 0x174 : 0x178))537 #define AR_PHY_CHNINFO_FINETIM (AR_SM_BASE + (AR_SREV_9561(ah) ? 0x178 : 0x17c))[all …]
188 AR_SREV_9561(ah)) { in ar9003_hw_set_channel()204 AR_SREV_9531(ah) || AR_SREV_9561(ah)) && in ar9003_hw_set_channel()271 AR_SREV_9550(ah) || AR_SREV_9561(ah)) { in ar9003_hw_spur_mitigate_mrc_cck()298 AR_SREV_9550(ah) || AR_SREV_9561(ah)) in ar9003_hw_spur_mitigate_mrc_cck()649 if (!AR_SREV_9561(ah)) in ar9003_hw_set_channel_regs()754 AR_SREV_9561(ah)) { in ar9003_hw_override_ini()935 if (AR_SREV_9550(ah) || AR_SREV_9561(ah)) in ar9003_hw_process_ini()939 if (AR_SREV_9561(ah) && (ar9003_hw_get_rx_gain_idx(ah) == 0)) in ar9003_hw_process_ini()945 if (AR_SREV_9550(ah) || AR_SREV_9531(ah) || AR_SREV_9561(ah)) { in ar9003_hw_process_ini()951 if (AR_SREV_9561(ah)) in ar9003_hw_process_ini()[all …]
379 } else if (AR_SREV_9561(ah)) { in ar9003_hw_init_mode_regs()617 else if (AR_SREV_9561(ah)) in ar9003_tx_gain_table_mode0()670 } else if (AR_SREV_9561(ah)) in ar9003_tx_gain_table_mode1()710 else if (AR_SREV_9561(ah)) in ar9003_tx_gain_table_mode2()784 else if (AR_SREV_9561(ah)) in ar9003_tx_gain_table_mode5()858 } else if (AR_SREV_9561(ah)) { in ar9003_rx_gain_table_mode0()920 } else if (AR_SREV_9561(ah)) { in ar9003_rx_gain_table_mode1()
819 AR_SREV_9561(ah)) { in ath9k_hw_init_pll()830 if (AR_SREV_9531(ah) || AR_SREV_9561(ah)) { in ath9k_hw_init_pll()847 AR_SREV_9561(ah)) ? in ath9k_hw_init_pll()854 if (AR_SREV_9531(ah) || AR_SREV_9561(ah)) in ath9k_hw_init_pll()872 else if (AR_SREV_9531(ah) || AR_SREV_9561(ah)) { in ath9k_hw_init_pll()889 if (AR_SREV_9531(ah) || AR_SREV_9561(ah)) in ath9k_hw_init_pll()930 AR_SREV_9561(ah)) in ath9k_hw_init_interrupt_masks()1763 AR_SREV_9561(ah)) in ath9k_hw_init_desc()2457 } else if (AR_SREV_9561(ah)) { in ath9k_gpio_cap_init()2596 !AR_SREV_9561(ah) && !AR_SREV_9565(ah)) in ath9k_hw_fill_cap_info()[all …]
264 AR_SREV_9565(ah) || AR_SREV_9561(ah)) in ath9k_hw_set_cck_nil()
993 #define AR_SREV_9561(_ah) \ macro998 AR_SREV_9561(ah))
3608 AR_SREV_9531(ah) || AR_SREV_9561(ah)) in ar9003_hw_xpa_bias_level_apply()3671 } else if (AR_SREV_9550(ah) || AR_SREV_9531(ah) || AR_SREV_9561(ah)) { in ar9003_hw_ant_ctrl_apply()4002 AR_SREV_9561(ah)) { in ar9003_hw_internal_regulator_apply()4006 if (AR_SREV_9561(ah)) in ar9003_hw_internal_regulator_apply()4111 !AR_SREV_9561(ah)) in ar9003_hw_xpa_timing_control_apply()4894 if (AR_SREV_9550(ah) || AR_SREV_9531(ah) || AR_SREV_9561(ah)) { in ar9003_hw_power_control_override()
816 AR_SREV_9561(ah)) in __ath9k_hw_enable_interrupts()
424 AR_SREV_9561(sc->sc_ah)) in ath_calcrxfilter()
1209 else if (AR_SREV_9561(ah)) in ar9003_hw_manual_peak_cal()
