Searched refs:ARM_SMMU_CB_S1_MAIR0 (Results 1 – 3 of 3) sorted by relevance
164 #define ARM_SMMU_CB_S1_MAIR0 0x38 macro
274 iommu_writel(ctx, ARM_SMMU_CB_S1_MAIR0, in qcom_iommu_init_domain()
708 writel_relaxed(cb->mair[0], cb_base + ARM_SMMU_CB_S1_MAIR0); in arm_smmu_write_context_bank()
