Searched refs:ANALOGIX_DP_LN1_LINK_TRAINING_CTL (Results 1 – 2 of 2) sorted by relevance
84 #define ANALOGIX_DP_LN1_LINK_TRAINING_CTL 0x690 macro
717 reg = readl(dp->reg_base + ANALOGIX_DP_LN1_LINK_TRAINING_CTL); in analogix_dp_set_lane1_pre_emphasis()720 writel(reg, dp->reg_base + ANALOGIX_DP_LN1_LINK_TRAINING_CTL); in analogix_dp_set_lane1_pre_emphasis()760 writel(reg, dp->reg_base + ANALOGIX_DP_LN1_LINK_TRAINING_CTL); in analogix_dp_set_lane1_link_training()788 return readl(dp->reg_base + ANALOGIX_DP_LN1_LINK_TRAINING_CTL); in analogix_dp_get_lane1_link_training()
