Searched refs:AMD_CONFIG_REG_BASE (Results 1 – 2 of 2) sorted by relevance
51 AMD_CONFIG_REG_BASE = 0x2000, /* in dwords */ enumerator53 AMD_CONFIG_REG_SIZE = AMD_CONFIG_REG_END - AMD_CONFIG_REG_BASE
428 aw_reg_add_dword - AMD_CONFIG_REG_BASE; in dbgdev_address_watch_diq()439 aw_reg_add_dword - AMD_CONFIG_REG_BASE; in dbgdev_address_watch_diq()449 aw_reg_add_dword - AMD_CONFIG_REG_BASE; in dbgdev_address_watch_diq()465 aw_reg_add_dword - AMD_CONFIG_REG_BASE; in dbgdev_address_watch_diq()661 packets_vec[1].bitfields2.reg_offset = SQ_CMD / 4 - AMD_CONFIG_REG_BASE; in dbgdev_wave_control_diq()
