Searched refs:AMD_CG_SUPPORT_SDMA_MGCG (Results 1 – 10 of 10) sorted by relevance
1002 AMD_CG_SUPPORT_SDMA_MGCG | in vi_common_early_init()1018 AMD_CG_SUPPORT_SDMA_MGCG | in vi_common_early_init()1039 AMD_CG_SUPPORT_SDMA_MGCG | in vi_common_early_init()1062 AMD_CG_SUPPORT_SDMA_MGCG | in vi_common_early_init()1085 AMD_CG_SUPPORT_SDMA_MGCG | in vi_common_early_init()1137 AMD_CG_SUPPORT_SDMA_MGCG | in vi_common_early_init()1163 AMD_CG_SUPPORT_SDMA_MGCG | in vi_common_early_init()1383 if (adev->cg_flags & (AMD_CG_SUPPORT_SDMA_LS | AMD_CG_SUPPORT_SDMA_MGCG)) { in vi_common_set_clockgating_state_by_smu()1388 if (adev->cg_flags & AMD_CG_SUPPORT_SDMA_MGCG) { in vi_common_set_clockgating_state_by_smu()
644 AMD_CG_SUPPORT_SDMA_MGCG | in soc15_common_early_init()661 AMD_CG_SUPPORT_SDMA_MGCG | in soc15_common_early_init()683 AMD_CG_SUPPORT_SDMA_MGCG | in soc15_common_early_init()713 AMD_CG_SUPPORT_SDMA_MGCG | in soc15_common_early_init()
1379 AMD_CG_SUPPORT_SDMA_MGCG | in si_common_early_init()1400 AMD_CG_SUPPORT_SDMA_MGCG | in si_common_early_init()1420 AMD_CG_SUPPORT_SDMA_MGCG | in si_common_early_init()1442 AMD_CG_SUPPORT_SDMA_MGCG | in si_common_early_init()1461 AMD_CG_SUPPORT_SDMA_MGCG | in si_common_early_init()
1789 AMD_CG_SUPPORT_SDMA_MGCG | in cik_common_early_init()1809 AMD_CG_SUPPORT_SDMA_MGCG | in cik_common_early_init()1828 AMD_CG_SUPPORT_SDMA_MGCG | in cik_common_early_init()1864 AMD_CG_SUPPORT_SDMA_MGCG | in cik_common_early_init()
1498 if (enable && (adev->cg_flags & AMD_CG_SUPPORT_SDMA_MGCG)) { in sdma_v3_0_update_sdma_medium_grain_clock_gating()1596 *flags |= AMD_CG_SUPPORT_SDMA_MGCG; in sdma_v3_0_get_clockgating_state()
685 if (enable && (adev->cg_flags & AMD_CG_SUPPORT_SDMA_MGCG)) { in si_dma_set_clockgating_state()
1447 if (enable && (adev->cg_flags & AMD_CG_SUPPORT_SDMA_MGCG)) { in sdma_v4_0_update_medium_grain_clock_gating()1595 *flags |= AMD_CG_SUPPORT_SDMA_MGCG; in sdma_v4_0_get_clockgating_state()
902 if (enable && (adev->cg_flags & AMD_CG_SUPPORT_SDMA_MGCG)) { in cik_enable_sdma_mgcg()
52 {AMD_CG_SUPPORT_SDMA_MGCG, "System Direct Memory Access Medium Grain Clock Gating"},
82 #define AMD_CG_SUPPORT_SDMA_MGCG (1 << 11) macro