Searched refs:AMDGPU_IRQ_STATE_DISABLE (Results 1 – 22 of 22) sorted by relevance
37 AMDGPU_IRQ_STATE_DISABLE, enumerator
139 AMDGPU_IRQ_STATE_DISABLE); in amdgpu_irq_disable_all()424 state = AMDGPU_IRQ_STATE_DISABLE; in amdgpu_irq_update()
252 amdgpu_crtc->vsync_timer_enabled = AMDGPU_IRQ_STATE_DISABLE; in dce_virtual_crtc_init()485 dce_virtual_set_crtc_vblank_interrupt_state(adev, i, AMDGPU_IRQ_STATE_DISABLE); in dce_virtual_hw_fini()
612 case AMDGPU_IRQ_STATE_DISABLE: in si_dma_set_trap_irq_state()628 case AMDGPU_IRQ_STATE_DISABLE: in si_dma_set_trap_irq_state()
1136 case AMDGPU_IRQ_STATE_DISABLE: in cik_sdma_set_trap_irq_state()1152 case AMDGPU_IRQ_STATE_DISABLE: in cik_sdma_set_trap_irq_state()
1070 case AMDGPU_IRQ_STATE_DISABLE: in sdma_v2_4_set_trap_irq_state()1086 case AMDGPU_IRQ_STATE_DISABLE: in sdma_v2_4_set_trap_irq_state()
2858 case AMDGPU_IRQ_STATE_DISABLE: in dce_v8_0_set_crtc_vblank_interrupt_state()2909 case AMDGPU_IRQ_STATE_DISABLE: in dce_v8_0_set_crtc_vline_interrupt_state()2937 case AMDGPU_IRQ_STATE_DISABLE: in dce_v8_0_set_hpd_interrupt_state()3052 if (state == AMDGPU_IRQ_STATE_DISABLE) in dce_v8_0_set_pageflip_interrupt_state()
1406 case AMDGPU_IRQ_STATE_DISABLE: in sdma_v3_0_set_trap_irq_state()1422 case AMDGPU_IRQ_STATE_DISABLE: in sdma_v3_0_set_trap_irq_state()
6734 state == AMDGPU_IRQ_STATE_DISABLE ? 0 : 1); in gfx_v8_0_set_gfx_eop_interrupt_state()6773 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v8_0_set_compute_eop_interrupt_state()6794 state == AMDGPU_IRQ_STATE_DISABLE ? 0 : 1); in gfx_v8_0_set_priv_reg_fault_state()6805 state == AMDGPU_IRQ_STATE_DISABLE ? 0 : 1); in gfx_v8_0_set_priv_inst_fault_state()6857 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v8_0_set_cp_ecc_int_state()6902 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v8_0_set_sq_int_state()7088 state == AMDGPU_IRQ_STATE_DISABLE ? 0 : 1); in gfx_v8_0_kiq_set_interrupt_state()7093 state == AMDGPU_IRQ_STATE_DISABLE ? 0 : 1); in gfx_v8_0_kiq_set_interrupt_state()7098 state == AMDGPU_IRQ_STATE_DISABLE ? 0 : 1); in gfx_v8_0_kiq_set_interrupt_state()
3071 case AMDGPU_IRQ_STATE_DISABLE: in dce_v11_0_set_crtc_vblank_interrupt_state()3100 case AMDGPU_IRQ_STATE_DISABLE: in dce_v11_0_set_crtc_vline_interrupt_state()3130 case AMDGPU_IRQ_STATE_DISABLE: in dce_v11_0_set_hpd_irq_state()3208 if (state == AMDGPU_IRQ_STATE_DISABLE) in dce_v11_0_set_pageflip_irq_state()
2945 case AMDGPU_IRQ_STATE_DISABLE: in dce_v10_0_set_crtc_vblank_interrupt_state()2974 case AMDGPU_IRQ_STATE_DISABLE: in dce_v10_0_set_crtc_vline_interrupt_state()3004 case AMDGPU_IRQ_STATE_DISABLE: in dce_v10_0_set_hpd_irq_state()3082 if (state == AMDGPU_IRQ_STATE_DISABLE) in dce_v10_0_set_pageflip_irq_state()
3252 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v6_0_set_gfx_eop_interrupt_state()3273 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v6_0_set_compute_eop_interrupt_state()3315 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v6_0_set_priv_reg_fault_state()3340 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v6_0_set_priv_inst_fault_state()
1081 case AMDGPU_IRQ_STATE_DISABLE: in gmc_v6_0_vm_fault_interrupt_state()
217 case AMDGPU_IRQ_STATE_DISABLE: in gmc_v9_0_vm_fault_interrupt_state()
4366 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v9_0_set_gfx_eop_interrupt_state()4413 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v9_0_set_compute_eop_interrupt_state()4436 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v9_0_set_priv_reg_fault_state()4455 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v9_0_set_priv_inst_fault_state()4572 if (state == AMDGPU_IRQ_STATE_DISABLE) { in gfx_v9_0_kiq_set_interrupt_state()
2807 case AMDGPU_IRQ_STATE_DISABLE: in dce_v6_0_set_crtc_vblank_interrupt_state()2842 case AMDGPU_IRQ_STATE_DISABLE: in dce_v6_0_set_hpd_interrupt_state()2957 if (state == AMDGPU_IRQ_STATE_DISABLE) in dce_v6_0_set_pageflip_interrupt_state()
4796 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v7_0_set_gfx_eop_interrupt_state()4847 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v7_0_set_compute_eop_interrupt_state()4870 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v7_0_set_priv_reg_fault_state()4895 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v7_0_set_priv_inst_fault_state()
1244 case AMDGPU_IRQ_STATE_DISABLE: in gmc_v7_0_vm_fault_interrupt_state()
1394 case AMDGPU_IRQ_STATE_DISABLE: in gmc_v8_0_vm_fault_interrupt_state()
3149 case AMDGPU_IRQ_STATE_DISABLE: in kv_dpm_set_interrupt_state()3166 case AMDGPU_IRQ_STATE_DISABLE: in kv_dpm_set_interrupt_state()
6458 case AMDGPU_IRQ_STATE_DISABLE: in ci_dpm_set_interrupt_state()6475 case AMDGPU_IRQ_STATE_DISABLE: in ci_dpm_set_interrupt_state()
7511 case AMDGPU_IRQ_STATE_DISABLE: in si_dpm_set_interrupt_state()7528 case AMDGPU_IRQ_STATE_DISABLE: in si_dpm_set_interrupt_state()