1 /*
2 * AD5933 AD5934 Impedance Converter, Network Analyzer
3 *
4 * Copyright 2011 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2.
7 */
8
9 #include <linux/interrupt.h>
10 #include <linux/device.h>
11 #include <linux/kernel.h>
12 #include <linux/sysfs.h>
13 #include <linux/i2c.h>
14 #include <linux/regulator/consumer.h>
15 #include <linux/types.h>
16 #include <linux/err.h>
17 #include <linux/delay.h>
18 #include <linux/module.h>
19
20 #include <linux/iio/iio.h>
21 #include <linux/iio/sysfs.h>
22 #include <linux/iio/buffer.h>
23 #include <linux/iio/kfifo_buf.h>
24
25 /* AD5933/AD5934 Registers */
26 #define AD5933_REG_CONTROL_HB 0x80 /* R/W, 1 byte */
27 #define AD5933_REG_CONTROL_LB 0x81 /* R/W, 1 byte */
28 #define AD5933_REG_FREQ_START 0x82 /* R/W, 3 bytes */
29 #define AD5933_REG_FREQ_INC 0x85 /* R/W, 3 bytes */
30 #define AD5933_REG_INC_NUM 0x88 /* R/W, 2 bytes, 9 bit */
31 #define AD5933_REG_SETTLING_CYCLES 0x8A /* R/W, 2 bytes */
32 #define AD5933_REG_STATUS 0x8F /* R, 1 byte */
33 #define AD5933_REG_TEMP_DATA 0x92 /* R, 2 bytes*/
34 #define AD5933_REG_REAL_DATA 0x94 /* R, 2 bytes*/
35 #define AD5933_REG_IMAG_DATA 0x96 /* R, 2 bytes*/
36
37 /* AD5933_REG_CONTROL_HB Bits */
38 #define AD5933_CTRL_INIT_START_FREQ (0x1 << 4)
39 #define AD5933_CTRL_START_SWEEP (0x2 << 4)
40 #define AD5933_CTRL_INC_FREQ (0x3 << 4)
41 #define AD5933_CTRL_REPEAT_FREQ (0x4 << 4)
42 #define AD5933_CTRL_MEASURE_TEMP (0x9 << 4)
43 #define AD5933_CTRL_POWER_DOWN (0xA << 4)
44 #define AD5933_CTRL_STANDBY (0xB << 4)
45
46 #define AD5933_CTRL_RANGE_2000mVpp (0x0 << 1)
47 #define AD5933_CTRL_RANGE_200mVpp (0x1 << 1)
48 #define AD5933_CTRL_RANGE_400mVpp (0x2 << 1)
49 #define AD5933_CTRL_RANGE_1000mVpp (0x3 << 1)
50 #define AD5933_CTRL_RANGE(x) ((x) << 1)
51
52 #define AD5933_CTRL_PGA_GAIN_1 (0x1 << 0)
53 #define AD5933_CTRL_PGA_GAIN_5 (0x0 << 0)
54
55 /* AD5933_REG_CONTROL_LB Bits */
56 #define AD5933_CTRL_RESET (0x1 << 4)
57 #define AD5933_CTRL_INT_SYSCLK (0x0 << 3)
58 #define AD5933_CTRL_EXT_SYSCLK (0x1 << 3)
59
60 /* AD5933_REG_STATUS Bits */
61 #define AD5933_STAT_TEMP_VALID (0x1 << 0)
62 #define AD5933_STAT_DATA_VALID (0x1 << 1)
63 #define AD5933_STAT_SWEEP_DONE (0x1 << 2)
64
65 /* I2C Block Commands */
66 #define AD5933_I2C_BLOCK_WRITE 0xA0
67 #define AD5933_I2C_BLOCK_READ 0xA1
68 #define AD5933_I2C_ADDR_POINTER 0xB0
69
70 /* Device Specs */
71 #define AD5933_INT_OSC_FREQ_Hz 16776000
72 #define AD5933_MAX_OUTPUT_FREQ_Hz 100000
73 #define AD5933_MAX_RETRIES 100
74
75 #define AD5933_OUT_RANGE 1
76 #define AD5933_OUT_RANGE_AVAIL 2
77 #define AD5933_OUT_SETTLING_CYCLES 3
78 #define AD5933_IN_PGA_GAIN 4
79 #define AD5933_IN_PGA_GAIN_AVAIL 5
80 #define AD5933_FREQ_POINTS 6
81
82 #define AD5933_POLL_TIME_ms 10
83 #define AD5933_INIT_EXCITATION_TIME_ms 100
84
85 /**
86 * struct ad5933_platform_data - platform specific data
87 * @ext_clk_Hz: the external clock frequency in Hz, if not set
88 * the driver uses the internal clock (16.776 MHz)
89 * @vref_mv: the external reference voltage in millivolt
90 */
91
92 struct ad5933_platform_data {
93 unsigned long ext_clk_Hz;
94 unsigned short vref_mv;
95 };
96
97 struct ad5933_state {
98 struct i2c_client *client;
99 struct regulator *reg;
100 struct delayed_work work;
101 struct mutex lock; /* Protect sensor state */
102 unsigned long mclk_hz;
103 unsigned char ctrl_hb;
104 unsigned char ctrl_lb;
105 unsigned int range_avail[4];
106 unsigned short vref_mv;
107 unsigned short settling_cycles;
108 unsigned short freq_points;
109 unsigned int freq_start;
110 unsigned int freq_inc;
111 unsigned int state;
112 unsigned int poll_time_jiffies;
113 };
114
115 static struct ad5933_platform_data ad5933_default_pdata = {
116 .vref_mv = 3300,
117 };
118
119 #define AD5933_CHANNEL(_type, _extend_name, _info_mask_separate, _address, \
120 _scan_index, _realbits) { \
121 .type = (_type), \
122 .extend_name = (_extend_name), \
123 .info_mask_separate = (_info_mask_separate), \
124 .address = (_address), \
125 .scan_index = (_scan_index), \
126 .scan_type = { \
127 .sign = 's', \
128 .realbits = (_realbits), \
129 .storagebits = 16, \
130 }, \
131 }
132
133 static const struct iio_chan_spec ad5933_channels[] = {
134 AD5933_CHANNEL(IIO_TEMP, NULL, BIT(IIO_CHAN_INFO_RAW) |
135 BIT(IIO_CHAN_INFO_SCALE), AD5933_REG_TEMP_DATA, -1, 14),
136 /* Ring Channels */
137 AD5933_CHANNEL(IIO_VOLTAGE, "real", 0, AD5933_REG_REAL_DATA, 0, 16),
138 AD5933_CHANNEL(IIO_VOLTAGE, "imag", 0, AD5933_REG_IMAG_DATA, 1, 16),
139 };
140
ad5933_i2c_write(struct i2c_client * client,u8 reg,u8 len,u8 * data)141 static int ad5933_i2c_write(struct i2c_client *client, u8 reg, u8 len, u8 *data)
142 {
143 int ret;
144
145 while (len--) {
146 ret = i2c_smbus_write_byte_data(client, reg++, *data++);
147 if (ret < 0) {
148 dev_err(&client->dev, "I2C write error\n");
149 return ret;
150 }
151 }
152 return 0;
153 }
154
ad5933_i2c_read(struct i2c_client * client,u8 reg,u8 len,u8 * data)155 static int ad5933_i2c_read(struct i2c_client *client, u8 reg, u8 len, u8 *data)
156 {
157 int ret;
158
159 while (len--) {
160 ret = i2c_smbus_read_byte_data(client, reg++);
161 if (ret < 0) {
162 dev_err(&client->dev, "I2C read error\n");
163 return ret;
164 }
165 *data++ = ret;
166 }
167 return 0;
168 }
169
ad5933_cmd(struct ad5933_state * st,unsigned char cmd)170 static int ad5933_cmd(struct ad5933_state *st, unsigned char cmd)
171 {
172 unsigned char dat = st->ctrl_hb | cmd;
173
174 return ad5933_i2c_write(st->client,
175 AD5933_REG_CONTROL_HB, 1, &dat);
176 }
177
ad5933_reset(struct ad5933_state * st)178 static int ad5933_reset(struct ad5933_state *st)
179 {
180 unsigned char dat = st->ctrl_lb | AD5933_CTRL_RESET;
181
182 return ad5933_i2c_write(st->client,
183 AD5933_REG_CONTROL_LB, 1, &dat);
184 }
185
ad5933_wait_busy(struct ad5933_state * st,unsigned char event)186 static int ad5933_wait_busy(struct ad5933_state *st, unsigned char event)
187 {
188 unsigned char val, timeout = AD5933_MAX_RETRIES;
189 int ret;
190
191 while (timeout--) {
192 ret = ad5933_i2c_read(st->client, AD5933_REG_STATUS, 1, &val);
193 if (ret < 0)
194 return ret;
195 if (val & event)
196 return val;
197 cpu_relax();
198 mdelay(1);
199 }
200
201 return -EAGAIN;
202 }
203
ad5933_set_freq(struct ad5933_state * st,unsigned int reg,unsigned long freq)204 static int ad5933_set_freq(struct ad5933_state *st,
205 unsigned int reg, unsigned long freq)
206 {
207 unsigned long long freqreg;
208 union {
209 __be32 d32;
210 u8 d8[4];
211 } dat;
212
213 freqreg = (u64) freq * (u64) (1 << 27);
214 do_div(freqreg, st->mclk_hz / 4);
215
216 switch (reg) {
217 case AD5933_REG_FREQ_START:
218 st->freq_start = freq;
219 break;
220 case AD5933_REG_FREQ_INC:
221 st->freq_inc = freq;
222 break;
223 default:
224 return -EINVAL;
225 }
226
227 dat.d32 = cpu_to_be32(freqreg);
228 return ad5933_i2c_write(st->client, reg, 3, &dat.d8[1]);
229 }
230
ad5933_setup(struct ad5933_state * st)231 static int ad5933_setup(struct ad5933_state *st)
232 {
233 __be16 dat;
234 int ret;
235
236 ret = ad5933_reset(st);
237 if (ret < 0)
238 return ret;
239
240 ret = ad5933_set_freq(st, AD5933_REG_FREQ_START, 10000);
241 if (ret < 0)
242 return ret;
243
244 ret = ad5933_set_freq(st, AD5933_REG_FREQ_INC, 200);
245 if (ret < 0)
246 return ret;
247
248 st->settling_cycles = 10;
249 dat = cpu_to_be16(st->settling_cycles);
250
251 ret = ad5933_i2c_write(st->client,
252 AD5933_REG_SETTLING_CYCLES,
253 2, (u8 *)&dat);
254 if (ret < 0)
255 return ret;
256
257 st->freq_points = 100;
258 dat = cpu_to_be16(st->freq_points);
259
260 return ad5933_i2c_write(st->client, AD5933_REG_INC_NUM, 2, (u8 *)&dat);
261 }
262
ad5933_calc_out_ranges(struct ad5933_state * st)263 static void ad5933_calc_out_ranges(struct ad5933_state *st)
264 {
265 int i;
266 unsigned int normalized_3v3[4] = {1980, 198, 383, 970};
267
268 for (i = 0; i < 4; i++)
269 st->range_avail[i] = normalized_3v3[i] * st->vref_mv / 3300;
270
271 }
272
273 /*
274 * handles: AD5933_REG_FREQ_START and AD5933_REG_FREQ_INC
275 */
276
ad5933_show_frequency(struct device * dev,struct device_attribute * attr,char * buf)277 static ssize_t ad5933_show_frequency(struct device *dev,
278 struct device_attribute *attr,
279 char *buf)
280 {
281 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
282 struct ad5933_state *st = iio_priv(indio_dev);
283 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
284 int ret;
285 unsigned long long freqreg;
286 union {
287 __be32 d32;
288 u8 d8[4];
289 } dat;
290
291 ret = iio_device_claim_direct_mode(indio_dev);
292 if (ret)
293 return ret;
294 ret = ad5933_i2c_read(st->client, this_attr->address, 3, &dat.d8[1]);
295 iio_device_release_direct_mode(indio_dev);
296 if (ret < 0)
297 return ret;
298
299 freqreg = be32_to_cpu(dat.d32) & 0xFFFFFF;
300
301 freqreg = (u64)freqreg * (u64)(st->mclk_hz / 4);
302 do_div(freqreg, 1 << 27);
303
304 return sprintf(buf, "%d\n", (int)freqreg);
305 }
306
ad5933_store_frequency(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)307 static ssize_t ad5933_store_frequency(struct device *dev,
308 struct device_attribute *attr,
309 const char *buf,
310 size_t len)
311 {
312 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
313 struct ad5933_state *st = iio_priv(indio_dev);
314 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
315 unsigned long val;
316 int ret;
317
318 ret = kstrtoul(buf, 10, &val);
319 if (ret)
320 return ret;
321
322 if (val > AD5933_MAX_OUTPUT_FREQ_Hz)
323 return -EINVAL;
324
325 ret = iio_device_claim_direct_mode(indio_dev);
326 if (ret)
327 return ret;
328 ret = ad5933_set_freq(st, this_attr->address, val);
329 iio_device_release_direct_mode(indio_dev);
330
331 return ret ? ret : len;
332 }
333
334 static IIO_DEVICE_ATTR(out_voltage0_freq_start, 0644,
335 ad5933_show_frequency,
336 ad5933_store_frequency,
337 AD5933_REG_FREQ_START);
338
339 static IIO_DEVICE_ATTR(out_voltage0_freq_increment, 0644,
340 ad5933_show_frequency,
341 ad5933_store_frequency,
342 AD5933_REG_FREQ_INC);
343
ad5933_show(struct device * dev,struct device_attribute * attr,char * buf)344 static ssize_t ad5933_show(struct device *dev,
345 struct device_attribute *attr,
346 char *buf)
347 {
348 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
349 struct ad5933_state *st = iio_priv(indio_dev);
350 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
351 int ret = 0, len = 0;
352
353 mutex_lock(&st->lock);
354 switch ((u32)this_attr->address) {
355 case AD5933_OUT_RANGE:
356 len = sprintf(buf, "%u\n",
357 st->range_avail[(st->ctrl_hb >> 1) & 0x3]);
358 break;
359 case AD5933_OUT_RANGE_AVAIL:
360 len = sprintf(buf, "%u %u %u %u\n", st->range_avail[0],
361 st->range_avail[3], st->range_avail[2],
362 st->range_avail[1]);
363 break;
364 case AD5933_OUT_SETTLING_CYCLES:
365 len = sprintf(buf, "%d\n", st->settling_cycles);
366 break;
367 case AD5933_IN_PGA_GAIN:
368 len = sprintf(buf, "%s\n",
369 (st->ctrl_hb & AD5933_CTRL_PGA_GAIN_1) ?
370 "1" : "0.2");
371 break;
372 case AD5933_IN_PGA_GAIN_AVAIL:
373 len = sprintf(buf, "1 0.2\n");
374 break;
375 case AD5933_FREQ_POINTS:
376 len = sprintf(buf, "%d\n", st->freq_points);
377 break;
378 default:
379 ret = -EINVAL;
380 }
381
382 mutex_unlock(&st->lock);
383 return ret ? ret : len;
384 }
385
ad5933_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)386 static ssize_t ad5933_store(struct device *dev,
387 struct device_attribute *attr,
388 const char *buf,
389 size_t len)
390 {
391 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
392 struct ad5933_state *st = iio_priv(indio_dev);
393 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
394 u16 val;
395 int i, ret = 0;
396 __be16 dat;
397
398 if (this_attr->address != AD5933_IN_PGA_GAIN) {
399 ret = kstrtou16(buf, 10, &val);
400 if (ret)
401 return ret;
402 }
403
404 ret = iio_device_claim_direct_mode(indio_dev);
405 if (ret)
406 return ret;
407 mutex_lock(&st->lock);
408 switch ((u32)this_attr->address) {
409 case AD5933_OUT_RANGE:
410 ret = -EINVAL;
411 for (i = 0; i < 4; i++)
412 if (val == st->range_avail[i]) {
413 st->ctrl_hb &= ~AD5933_CTRL_RANGE(0x3);
414 st->ctrl_hb |= AD5933_CTRL_RANGE(i);
415 ret = ad5933_cmd(st, 0);
416 break;
417 }
418 break;
419 case AD5933_IN_PGA_GAIN:
420 if (sysfs_streq(buf, "1")) {
421 st->ctrl_hb |= AD5933_CTRL_PGA_GAIN_1;
422 } else if (sysfs_streq(buf, "0.2")) {
423 st->ctrl_hb &= ~AD5933_CTRL_PGA_GAIN_1;
424 } else {
425 ret = -EINVAL;
426 break;
427 }
428 ret = ad5933_cmd(st, 0);
429 break;
430 case AD5933_OUT_SETTLING_CYCLES:
431 val = clamp(val, (u16)0, (u16)0x7FF);
432 st->settling_cycles = val;
433
434 /* 2x, 4x handling, see datasheet */
435 if (val > 1022)
436 val = (val >> 2) | (3 << 9);
437 else if (val > 511)
438 val = (val >> 1) | (1 << 9);
439
440 dat = cpu_to_be16(val);
441 ret = ad5933_i2c_write(st->client,
442 AD5933_REG_SETTLING_CYCLES,
443 2, (u8 *)&dat);
444 break;
445 case AD5933_FREQ_POINTS:
446 val = clamp(val, (u16)0, (u16)511);
447 st->freq_points = val;
448
449 dat = cpu_to_be16(val);
450 ret = ad5933_i2c_write(st->client, AD5933_REG_INC_NUM, 2,
451 (u8 *)&dat);
452 break;
453 default:
454 ret = -EINVAL;
455 }
456
457 mutex_unlock(&st->lock);
458 iio_device_release_direct_mode(indio_dev);
459 return ret ? ret : len;
460 }
461
462 static IIO_DEVICE_ATTR(out_voltage0_scale, 0644,
463 ad5933_show,
464 ad5933_store,
465 AD5933_OUT_RANGE);
466
467 static IIO_DEVICE_ATTR(out_voltage0_scale_available, 0444,
468 ad5933_show,
469 NULL,
470 AD5933_OUT_RANGE_AVAIL);
471
472 static IIO_DEVICE_ATTR(in_voltage0_scale, 0644,
473 ad5933_show,
474 ad5933_store,
475 AD5933_IN_PGA_GAIN);
476
477 static IIO_DEVICE_ATTR(in_voltage0_scale_available, 0444,
478 ad5933_show,
479 NULL,
480 AD5933_IN_PGA_GAIN_AVAIL);
481
482 static IIO_DEVICE_ATTR(out_voltage0_freq_points, 0644,
483 ad5933_show,
484 ad5933_store,
485 AD5933_FREQ_POINTS);
486
487 static IIO_DEVICE_ATTR(out_voltage0_settling_cycles, 0644,
488 ad5933_show,
489 ad5933_store,
490 AD5933_OUT_SETTLING_CYCLES);
491
492 /* note:
493 * ideally we would handle the scale attributes via the iio_info
494 * (read|write)_raw methods, however this part is a untypical since we
495 * don't create dedicated sysfs channel attributes for out0 and in0.
496 */
497 static struct attribute *ad5933_attributes[] = {
498 &iio_dev_attr_out_voltage0_scale.dev_attr.attr,
499 &iio_dev_attr_out_voltage0_scale_available.dev_attr.attr,
500 &iio_dev_attr_out_voltage0_freq_start.dev_attr.attr,
501 &iio_dev_attr_out_voltage0_freq_increment.dev_attr.attr,
502 &iio_dev_attr_out_voltage0_freq_points.dev_attr.attr,
503 &iio_dev_attr_out_voltage0_settling_cycles.dev_attr.attr,
504 &iio_dev_attr_in_voltage0_scale.dev_attr.attr,
505 &iio_dev_attr_in_voltage0_scale_available.dev_attr.attr,
506 NULL
507 };
508
509 static const struct attribute_group ad5933_attribute_group = {
510 .attrs = ad5933_attributes,
511 };
512
ad5933_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long m)513 static int ad5933_read_raw(struct iio_dev *indio_dev,
514 struct iio_chan_spec const *chan,
515 int *val,
516 int *val2,
517 long m)
518 {
519 struct ad5933_state *st = iio_priv(indio_dev);
520 __be16 dat;
521 int ret;
522
523 switch (m) {
524 case IIO_CHAN_INFO_RAW:
525 ret = iio_device_claim_direct_mode(indio_dev);
526 if (ret)
527 return ret;
528 ret = ad5933_cmd(st, AD5933_CTRL_MEASURE_TEMP);
529 if (ret < 0)
530 goto out;
531 ret = ad5933_wait_busy(st, AD5933_STAT_TEMP_VALID);
532 if (ret < 0)
533 goto out;
534
535 ret = ad5933_i2c_read(st->client,
536 AD5933_REG_TEMP_DATA,
537 2, (u8 *)&dat);
538 if (ret < 0)
539 goto out;
540 iio_device_release_direct_mode(indio_dev);
541 *val = sign_extend32(be16_to_cpu(dat), 13);
542
543 return IIO_VAL_INT;
544 case IIO_CHAN_INFO_SCALE:
545 *val = 1000;
546 *val2 = 5;
547 return IIO_VAL_FRACTIONAL_LOG2;
548 }
549
550 return -EINVAL;
551 out:
552 iio_device_release_direct_mode(indio_dev);
553 return ret;
554 }
555
556 static const struct iio_info ad5933_info = {
557 .read_raw = ad5933_read_raw,
558 .attrs = &ad5933_attribute_group,
559 };
560
ad5933_ring_preenable(struct iio_dev * indio_dev)561 static int ad5933_ring_preenable(struct iio_dev *indio_dev)
562 {
563 struct ad5933_state *st = iio_priv(indio_dev);
564 int ret;
565
566 if (bitmap_empty(indio_dev->active_scan_mask, indio_dev->masklength))
567 return -EINVAL;
568
569 ret = ad5933_reset(st);
570 if (ret < 0)
571 return ret;
572
573 ret = ad5933_cmd(st, AD5933_CTRL_STANDBY);
574 if (ret < 0)
575 return ret;
576
577 ret = ad5933_cmd(st, AD5933_CTRL_INIT_START_FREQ);
578 if (ret < 0)
579 return ret;
580
581 st->state = AD5933_CTRL_INIT_START_FREQ;
582
583 return 0;
584 }
585
ad5933_ring_postenable(struct iio_dev * indio_dev)586 static int ad5933_ring_postenable(struct iio_dev *indio_dev)
587 {
588 struct ad5933_state *st = iio_priv(indio_dev);
589
590 /* AD5933_CTRL_INIT_START_FREQ:
591 * High Q complex circuits require a long time to reach steady state.
592 * To facilitate the measurement of such impedances, this mode allows
593 * the user full control of the settling time requirement before
594 * entering start frequency sweep mode where the impedance measurement
595 * takes place. In this mode the impedance is excited with the
596 * programmed start frequency (ad5933_ring_preenable),
597 * but no measurement takes place.
598 */
599
600 schedule_delayed_work(&st->work,
601 msecs_to_jiffies(AD5933_INIT_EXCITATION_TIME_ms));
602 return 0;
603 }
604
ad5933_ring_postdisable(struct iio_dev * indio_dev)605 static int ad5933_ring_postdisable(struct iio_dev *indio_dev)
606 {
607 struct ad5933_state *st = iio_priv(indio_dev);
608
609 cancel_delayed_work_sync(&st->work);
610 return ad5933_cmd(st, AD5933_CTRL_POWER_DOWN);
611 }
612
613 static const struct iio_buffer_setup_ops ad5933_ring_setup_ops = {
614 .preenable = ad5933_ring_preenable,
615 .postenable = ad5933_ring_postenable,
616 .postdisable = ad5933_ring_postdisable,
617 };
618
ad5933_register_ring_funcs_and_init(struct iio_dev * indio_dev)619 static int ad5933_register_ring_funcs_and_init(struct iio_dev *indio_dev)
620 {
621 struct iio_buffer *buffer;
622
623 buffer = iio_kfifo_allocate();
624 if (!buffer)
625 return -ENOMEM;
626
627 iio_device_attach_buffer(indio_dev, buffer);
628
629 /* Ring buffer functions - here trigger setup related */
630 indio_dev->setup_ops = &ad5933_ring_setup_ops;
631
632 return 0;
633 }
634
ad5933_work(struct work_struct * work)635 static void ad5933_work(struct work_struct *work)
636 {
637 struct ad5933_state *st = container_of(work,
638 struct ad5933_state, work.work);
639 struct iio_dev *indio_dev = i2c_get_clientdata(st->client);
640 __be16 buf[2];
641 int val[2];
642 unsigned char status;
643 int ret;
644
645 if (st->state == AD5933_CTRL_INIT_START_FREQ) {
646 /* start sweep */
647 ad5933_cmd(st, AD5933_CTRL_START_SWEEP);
648 st->state = AD5933_CTRL_START_SWEEP;
649 schedule_delayed_work(&st->work, st->poll_time_jiffies);
650 return;
651 }
652
653 ret = ad5933_i2c_read(st->client, AD5933_REG_STATUS, 1, &status);
654 if (ret)
655 return;
656
657 if (status & AD5933_STAT_DATA_VALID) {
658 int scan_count = bitmap_weight(indio_dev->active_scan_mask,
659 indio_dev->masklength);
660 ret = ad5933_i2c_read(st->client,
661 test_bit(1, indio_dev->active_scan_mask) ?
662 AD5933_REG_REAL_DATA : AD5933_REG_IMAG_DATA,
663 scan_count * 2, (u8 *)buf);
664 if (ret)
665 return;
666
667 if (scan_count == 2) {
668 val[0] = be16_to_cpu(buf[0]);
669 val[1] = be16_to_cpu(buf[1]);
670 } else {
671 val[0] = be16_to_cpu(buf[0]);
672 }
673 iio_push_to_buffers(indio_dev, val);
674 } else {
675 /* no data available - try again later */
676 schedule_delayed_work(&st->work, st->poll_time_jiffies);
677 return;
678 }
679
680 if (status & AD5933_STAT_SWEEP_DONE) {
681 /* last sample received - power down do
682 * nothing until the ring enable is toggled
683 */
684 ad5933_cmd(st, AD5933_CTRL_POWER_DOWN);
685 } else {
686 /* we just received a valid datum, move on to the next */
687 ad5933_cmd(st, AD5933_CTRL_INC_FREQ);
688 schedule_delayed_work(&st->work, st->poll_time_jiffies);
689 }
690 }
691
ad5933_probe(struct i2c_client * client,const struct i2c_device_id * id)692 static int ad5933_probe(struct i2c_client *client,
693 const struct i2c_device_id *id)
694 {
695 int ret, voltage_uv = 0;
696 struct ad5933_platform_data *pdata = dev_get_platdata(&client->dev);
697 struct ad5933_state *st;
698 struct iio_dev *indio_dev;
699
700 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*st));
701 if (!indio_dev)
702 return -ENOMEM;
703
704 st = iio_priv(indio_dev);
705 i2c_set_clientdata(client, indio_dev);
706 st->client = client;
707
708 mutex_init(&st->lock);
709
710 if (!pdata)
711 pdata = &ad5933_default_pdata;
712
713 st->reg = devm_regulator_get(&client->dev, "vdd");
714 if (IS_ERR(st->reg))
715 return PTR_ERR(st->reg);
716
717 ret = regulator_enable(st->reg);
718 if (ret) {
719 dev_err(&client->dev, "Failed to enable specified VDD supply\n");
720 return ret;
721 }
722 voltage_uv = regulator_get_voltage(st->reg);
723
724 if (voltage_uv)
725 st->vref_mv = voltage_uv / 1000;
726 else
727 st->vref_mv = pdata->vref_mv;
728
729 if (pdata->ext_clk_Hz) {
730 st->mclk_hz = pdata->ext_clk_Hz;
731 st->ctrl_lb = AD5933_CTRL_EXT_SYSCLK;
732 } else {
733 st->mclk_hz = AD5933_INT_OSC_FREQ_Hz;
734 st->ctrl_lb = AD5933_CTRL_INT_SYSCLK;
735 }
736
737 ad5933_calc_out_ranges(st);
738 INIT_DELAYED_WORK(&st->work, ad5933_work);
739 st->poll_time_jiffies = msecs_to_jiffies(AD5933_POLL_TIME_ms);
740
741 indio_dev->dev.parent = &client->dev;
742 indio_dev->info = &ad5933_info;
743 indio_dev->name = id->name;
744 indio_dev->modes = (INDIO_BUFFER_SOFTWARE | INDIO_DIRECT_MODE);
745 indio_dev->channels = ad5933_channels;
746 indio_dev->num_channels = ARRAY_SIZE(ad5933_channels);
747
748 ret = ad5933_register_ring_funcs_and_init(indio_dev);
749 if (ret)
750 goto error_disable_reg;
751
752 ret = ad5933_setup(st);
753 if (ret)
754 goto error_unreg_ring;
755
756 ret = iio_device_register(indio_dev);
757 if (ret)
758 goto error_unreg_ring;
759
760 return 0;
761
762 error_unreg_ring:
763 iio_kfifo_free(indio_dev->buffer);
764 error_disable_reg:
765 regulator_disable(st->reg);
766
767 return ret;
768 }
769
ad5933_remove(struct i2c_client * client)770 static int ad5933_remove(struct i2c_client *client)
771 {
772 struct iio_dev *indio_dev = i2c_get_clientdata(client);
773 struct ad5933_state *st = iio_priv(indio_dev);
774
775 iio_device_unregister(indio_dev);
776 iio_kfifo_free(indio_dev->buffer);
777 regulator_disable(st->reg);
778
779 return 0;
780 }
781
782 static const struct i2c_device_id ad5933_id[] = {
783 { "ad5933", 0 },
784 { "ad5934", 0 },
785 {}
786 };
787
788 MODULE_DEVICE_TABLE(i2c, ad5933_id);
789
790 static struct i2c_driver ad5933_driver = {
791 .driver = {
792 .name = "ad5933",
793 },
794 .probe = ad5933_probe,
795 .remove = ad5933_remove,
796 .id_table = ad5933_id,
797 };
798 module_i2c_driver(ad5933_driver);
799
800 MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
801 MODULE_DESCRIPTION("Analog Devices AD5933 Impedance Conv. Network Analyzer");
802 MODULE_LICENSE("GPL v2");
803
