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Searched refs:A8 (Results 1 – 25 of 44) sorted by relevance

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/Linux-v4.19/arch/c6x/lib/
Dmemcpy_64plus.S24 [A1] LDB .D2T1 *B4++,A8
32 [A1] STB .D1T1 A8,*A3++
37 LDNDW .D2T1 *B4++,A9:A8
42 || STNDW .D1T1 A9:A8,*A3++
Dcsum_64plus.S75 || MPYU .M1 A7,A2,A8
80 || ADD .L1 A8,A9,A9
88 || ZERO .D1 A8
93 LDBU .D1T1 *A4++,A8
96 ADD .S1 A8,A9,A9
99 STB .D2T1 A8,*B4++
104 LDBU .D1T1 *A4++,A8
107 SHL .S1 A8,8,A0
111 STB .D2T1 A8,*B4++
399 || MV .S1 A6,A8
[all …]
Dstrasgi.S33 ldw .d2t1 *B4++, A8
60 || mv .s2x A8, B5
63 [B0] ldw .d2t1 *B4++, A8
84 [B0] stw .d1t1 A8, *A4++
/Linux-v4.19/arch/arm/mach-realview/
DKconfig95 bool "Support RealView(R) Platform Baseboard for Cortex(tm)-A8 platform"
99 Cortex(tm)-A8. This platform has an on-board Cortex-A8 and has
/Linux-v4.19/Documentation/device-mapper/
Ddm-raid.txt101 A4 A4 A5 A6 A6 A7 A7 A8 A8
113 A3 A4 A4 A5 A6 A5 A6 A7 A8
114 A5 A6 A7 A8 A9 A9 A10 A11 A12
117 A4 A3 A6 A4 A5 A6 A5 A8 A7
118 A6 A5 A9 A7 A8 A10 A9 A12 A11
127 A3 A4 A4 A5 A6 A5 A6 A7 A8
128 A4 A3 A6 A4 A5 A6 A5 A8 A7
129 A5 A6 A7 A8 A9 A9 A10 A11 A12
130 A6 A5 A9 A7 A8 A10 A9 A12 A11
/Linux-v4.19/arch/c6x/kernel/
Dentry.S80 || STDW .D1T1 A9:A8,*A15--[1]
164 LDDW .D1T1 *++A15[1],A9:A8
236 LDW .D2T1 *+SP(REGS_A8+8),A8
323 ;; A4,B4,A6,B6,A8,B8 = arguments of the syscall function
/Linux-v4.19/arch/arm/boot/dts/
Darm-realview-pba8.dts27 model = "ARM RealView Platform Baseboard for Cortex-A8";
Daspeed-bmc-opp-zaius.dts362 pins = "A8", "C7", "B7", "A7", "D7", "B6", "A6", "E7";
/Linux-v4.19/Documentation/ABI/stable/
Dsysfs-class-tpm139 A7 1F 3C A8 D0 12 15 3E CA 0E BD FA 24 CD 33 C6
144 F7 02 71 CF 15 AE 16 DD D1 C1 8E A8 CF 9B 50 7B
/Linux-v4.19/Documentation/arm/sunxi/
DREADME17 * ARM Cortex-A8 based SoCs
/Linux-v4.19/Documentation/hwmon/
Dk10temp12 * AMD Family 12h processors: "Llano" (E2/A4/A6/A8-Series)
/Linux-v4.19/arch/arm/crypto/
Dsha1-armv4-large.S50 @ issue Cortex A8 core was measured to process input block in
56 @ Cortex A8 core and in absolute terms ~870 cycles per input block
62 @ improvement on Cortex A8 core and 12.2 cycles per byte.
Dsha512-core.S_shipped27 @ Cortex A8 core and ~40 cycles per processed byte.
32 @ improvement on Coxtex A8 core and ~38 cycles per byte.
36 @ Add NEON implementation. On Cortex A8 it was measured to process
542 dmb @ errata #451034 on early Cortex A8
/Linux-v4.19/Documentation/devicetree/bindings/pinctrl/
Dpinctrl-aspeed.txt112 pins = "A8";
/Linux-v4.19/drivers/pinctrl/aspeed/
Dpinctrl-aspeed-g4.c442 #define A8 56 macro
447 MS_PIN_DECL(A8, GPIOH0, ROMD8, NCTS6);
498 FUNC_GROUP_DECL(UART6, A8, C7, B7, A7, D7, B6, A6, E7);
1708 A8, C7, B7, A7, D7, B6, A6, E7, W21, Y22, U19, R22, P18, P19,
1775 ASPEED_PINCTRL_PIN(A8),
2303 { PIN_CONFIG_BIAS_PULL_DOWN, { A8, E7 }, SCU8C, 23 },
2304 { PIN_CONFIG_BIAS_DISABLE, { A8, E7 }, SCU8C, 23 },
Dpinctrl-aspeed-g5.c1732 #define A8 233 macro
1735 MS_PIN_DECL_(A8, SIG_EXPR_LIST_PTR(USB2AHDN), SIG_EXPR_LIST_PTR(USB2ADDN));
1737 FUNC_GROUP_DECL(USB2AH, A7, A8);
1738 FUNC_GROUP_DECL(USB2AD, A7, A8);
1790 ASPEED_PINCTRL_PIN(A8),
/Linux-v4.19/arch/arm/mm/
Dproc-v7.S484 ldr r10, =0x00000c08 @ Cortex-A8 primary part number
583 @ Cortex-A8 - always needs bpiall switch_mm implementation
/Linux-v4.19/Documentation/devicetree/bindings/arm/
Dcpus.txt323 Example 2 (Cortex-A8 uniprocessor 32-bit system):
/Linux-v4.19/arch/arm/
DKconfig964 This option enables the workaround for the 430973 Cortex-A8
968 to physical address re-mapping, Cortex-A8 does not recover from the
969 stale interworking branch prediction. This results in Cortex-A8
981 This option enables the workaround for the 458693 Cortex-A8 (r2p0)
995 This option enables the workaround for the 460075 Cortex-A8 (r2p0)
/Linux-v4.19/Documentation/block/
Dbfq-iosched.txt31 - AMD A8-3850: 250 KIOPS
40 - AMD A8-3850: 200 KIOPS
/Linux-v4.19/arch/m68k/fpsp040/
Dbindec.S61 | A8. Clr INEX; Force RZ.
/Linux-v4.19/drivers/pinctrl/sh-pfc/
Dpfc-r8a77970.c163 #define IP1_3_0 FM(DU_DG4) F_(0, 0) F_(0, 0) FM(A8) FM(FSO_CFE_0_N_A) F_(0, 0) F_(0, 0) F_(0, …
421 PINMUX_IPSR_GPSR(IP1_3_0, A8),
Dpfc-r8a77990.c70 #define GPSR1_8 F_(A8, IP3_31_28)
213 #define IP3_31_28 FM(A8) FM(SDA6_A) FM(RX3_B) FM(HRX4_C) FM(VI5_HSYNC_N_A) FM(DU_HSYNC) FM(VI4…
684 PINMUX_IPSR_GPSR(IP3_31_28, A8),
Dpfc-r8a77980.c193 #define IP1_3_0 FM(DU_DG4) FM(SCL5) F_(0, 0) FM(A8) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0,…
493 PINMUX_IPSR_GPSR(IP1_3_0, A8),
/Linux-v4.19/Documentation/driver-api/
Dpinctl.rst65 PINCTRL_PIN(0, "A8"),
445 In this 8x8 BGA package the pins { A8, A7, A6, A5 } can be used as an SPI port
495 The Function spi is associated with pin groups { A8, A7, A6, A5 }

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